A 500 MHz, 32 bit, 0.4 /spl mu/m CMOS RISC processor

Kazumasa Suzuki, Masakazu Yamashina, Takashi Nakayama, Masanori Izumikawa, Masahiro Nomura, Hiroyuki Igura, Hideki Heiuchi, Junichi Goto, Toshiaki Inoue, Youichi Koseki, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Youich Yano, Hachiro Yamada. A 500 MHz, 32 bit, 0.4 /spl mu/m CMOS RISC processor. J. Solid-State Circuits, 29(12):1464-1473, December 1994. [doi]

Authors

Kazumasa Suzuki

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Masakazu Yamashina

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Takashi Nakayama

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Masanori Izumikawa

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Masahiro Nomura

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Hiroyuki Igura

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Hideki Heiuchi

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Junichi Goto

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Toshiaki Inoue

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Youichi Koseki

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Hitoshi Abiko

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Kazuhiro Okabe

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Atsuki Ono

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Youich Yano

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Hachiro Yamada

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