A 500 MHz, 32 bit, 0.4 /spl mu/m CMOS RISC processor - researchr publication related

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Kazumasa Suzuki, Masakazu Yamashina, Takashi Nakayama, Masanori Izumikawa, Masahiro Nomura, Hiroyuki Igura, Hideki Heiuchi, Junichi Goto, Toshiaki Inoue, Youichi Koseki, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Youich Yano, Hachiro Yamada. A 500 MHz, 32 bit, 0.4 /spl mu/m CMOS RISC processor. J. Solid-State Circuits, 29(12):1464-1473, December 1994. [doi]

The following publications are possibly variants of this publication:

A single-chip low power DSP/RISC CPU with 0.25 /spl mu/m CMOS technologyTakashi Shikata, Shinya Kondou, Masanori Nose, Yoshio Kuniyasu, Mutsuhiro Naitoh, Hidetaka Suzuki. cicc 1998: 123-126 [doi]

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