A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC

Akira Tanabe, Yasushi Nakahara, Akio Furukawa, Tohru Mogami. A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC. J. Solid-State Circuits, 38(1):107-113, 2003. [doi]

@article{TanabeNFM03,
  title = {A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC},
  author = {Akira Tanabe and Yasushi Nakahara and Akio Furukawa and Tohru Mogami},
  year = {2003},
  doi = {10.1109/JSSC.2002.806287},
  url = {https://doi.org/10.1109/JSSC.2002.806287},
  researchr = {https://researchr.org/publication/TanabeNFM03},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {38},
  number = {1},
  pages = {107-113},
}