A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC

Akira Tanabe, Yasushi Nakahara, Akio Furukawa, Tohru Mogami. A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC. J. Solid-State Circuits, 38(1):107-113, 2003. [doi]

Abstract

Abstract is missing.