A precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme

Hitoshi Tanaka, Masakazu Aoki, Takeshi Sakata, Shin'ichiro Kimura, Narumi Sakashita, Hideto Hidaka, Tadashi Tachibana, Katsutaka Kimura. A precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme. J. Solid-State Circuits, 34(8):1084-1090, 1999. [doi]

Abstract

Abstract is missing.