Himanshu Thapliyal, M. B. Srinivas, Hamid R. Arabnia. Reversible Logic Synthesis of Half, Full and Parallel Subtractors. In Laurence Tianruo Yang, Hamid R. Arabnia, Jürgen Becker, Masaharu Imai, Zoran A. Salcic, editors, Proceedings of The 2005 International Conference on Embedded Systems and Applications, ESA 2005, Las Vegas, Nevada, USA, June 27-30, 2005. pages 165-181, CSREA Press, 2005.
@inproceedings{ThapliyalSA05b,
title = {Reversible Logic Synthesis of Half, Full and Parallel Subtractors},
author = {Himanshu Thapliyal and M. B. Srinivas and Hamid R. Arabnia},
year = {2005},
tags = {logic},
researchr = {https://researchr.org/publication/ThapliyalSA05b},
cites = {0},
citedby = {0},
pages = {165-181},
booktitle = {Proceedings of The 2005 International Conference on Embedded Systems and Applications, ESA 2005, Las Vegas, Nevada, USA, June 27-30, 2005},
editor = {Laurence Tianruo Yang and Hamid R. Arabnia and Jürgen Becker and Masaharu Imai and Zoran A. Salcic},
publisher = {CSREA Press},
isbn = {1-932415-53-X},
}