The following publications are possibly variants of this publication:
- Improving formal timing analysis of switched ethernet by exploiting FIFO schedulingDaniel Thiele, Philip Axer, Rolf Ernst. dac 2015: 41 [doi]
- Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switchingJonas Diemer, Daniel Thiele, Rolf Ernst. sies 2012: 1-10 [doi]
- Improved formal worst-case timing analysis of weighted round robin scheduling for EthernetDaniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Jan Seyler. codes 2013: 1-10 [doi]
- Formal worst-case timing analysis of Ethernet TSN's burst-limiting shaperDaniel Thiele, Rolf Ernst. date 2016: 187-192 [doi]
- Formal timing analysis of CAN-to-Ethernet gateway strategies in automotive networksDaniel Thiele, Johannes Schlatow, Philip Axer, Rolf Ernst. rts, 52(1):88-112, 2016. [doi]