D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich. A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits. In Proceedings of the 20th IEEE Asian Test Symposium, ATS 2011, New Delhi, India, November 20-23, 2011. pages 136-141, IEEE Computer Society, 2011. [doi]
Abstract is missing.