A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems

D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich. A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems. J. Electronic Testing, 30(4):401-413, 2014. [doi]

@article{TranVBDGPW14,
  title = {A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems},
  author = {D. A. Tran and Arnaud Virazel and Alberto Bosio and Luigi Dilillo and Patrick Girard and Serge Pravossoudovitch and Hans-Joachim Wunderlich},
  year = {2014},
  doi = {10.1007/s10836-014-5459-3},
  url = {http://dx.doi.org/10.1007/s10836-014-5459-3},
  researchr = {https://researchr.org/publication/TranVBDGPW14},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Testing},
  volume = {30},
  number = {4},
  pages = {401-413},
}