Voltage and Temperature Scalable Logic Cell Leakage Models Considering Local Variations Based on Transistor Stacks

Janakiraman Viraraghavan, Bharadwaj Amrutur, V. Visvanathan. Voltage and Temperature Scalable Logic Cell Leakage Models Considering Local Variations Based on Transistor Stacks. J. Low Power Electronics, 4(3):301-319, 2008. [doi]

Authors

Janakiraman Viraraghavan

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Bharadwaj Amrutur

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V. Visvanathan

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