Circuit design challenges at the 14nm technology node

James D. Warnock. Circuit design challenges at the 14nm technology node. In Leon Stok, Nikil D. Dutt, Soha Hassoun, editors, Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011. pages 464-467, ACM, 2011. [doi]

Abstract

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