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Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De. Design and optimization of dual-threshold circuits for low-voltage low-power applications. IEEE Trans. VLSI Syst., 7(1):16-24, 1999. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Design and Optimization of Low Voltage High Performance Dual Threshold CMOS CircuitsLiqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De. dac 1998: 489-494 [doi] Simultaneous power supply, threshold voltage, and transistor size optimization for low-power operation of CMOS circuitsP. Pant, V. K. De, A. Chatterjee. tvlsi, 6(4):538-545, 1998. [doi]
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