Clustered Fault Tolerance TSV Planning for 3-D Integrated Circuits

Qi Xu, Song Chen, Xiaodong Xu, Bei Yu. Clustered Fault Tolerance TSV Planning for 3-D Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 36(8):1287-1300, 2017. [doi]

@article{XuCXY17,
  title = {Clustered Fault Tolerance TSV Planning for 3-D Integrated Circuits},
  author = {Qi Xu and Song Chen and Xiaodong Xu and Bei Yu},
  year = {2017},
  doi = {10.1109/TCAD.2017.2681080},
  url = {https://doi.org/10.1109/TCAD.2017.2681080},
  researchr = {https://researchr.org/publication/XuCXY17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {36},
  number = {8},
  pages = {1287-1300},
}