A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit - researchr publication authors

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Masanao Yamaoka, Kazumasa Yanagisawa, Shoji Shukuri, Katsuhiro Norisue, Koichiro Ishibashi. A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit. J. Solid-State Circuits, 37(5):599-604, 2002. [doi]

This author has not been identified. Look up 'Masanao Yamaoka' in GoogleThis author has not been identified. Look up 'Kazumasa Yanagisawa' in GoogleThis author has not been identified. Look up 'Shoji Shukuri' in GoogleThis author has not been identified. Look up 'Katsuhiro Norisue' in GoogleThis author has not been identified. Look up 'Koichiro Ishibashi' in Google

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