Masanao Yamaoka, Kazumasa Yanagisawa, Shoji Shukuri, Katsuhiro Norisue, Koichiro Ishibashi. A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit. J. Solid-State Circuits, 37(5):599-604, 2002. [doi]
@article{YamaokaYSNI02,
title = {A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit},
author = {Masanao Yamaoka and Kazumasa Yanagisawa and Shoji Shukuri and Katsuhiro Norisue and Koichiro Ishibashi},
year = {2002},
doi = {10.1109/4.997853},
url = {https://doi.org/10.1109/4.997853},
researchr = {https://researchr.org/publication/YamaokaYSNI02},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {37},
number = {5},
pages = {599-604},
}