A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit - researchr publication related

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Masanao Yamaoka, Kazumasa Yanagisawa, Shoji Shukuri, Katsuhiro Norisue, Koichiro Ishibashi. A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit. J. Solid-State Circuits, 37(5):599-604, 2002. [doi]

The following publications are possibly variants of this publication:

CMOS process compatible ie-Flash (inverse gate electrode Flash) technology for system-on-a-chipShoji Shukuri, Kazumasa Yanagisawa, Koichiro Ishibashi. cicc 2001: 179-182 [doi]

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