Yoon Seok Yang, Hrishikesh Deshpande, Gwan Choi, Paul V. Gratz. SDPR: Improving Latency and Bandwidth in On-Chip Interconnect Through Simultaneous Dual-Path Routing. IEEE Trans. on CAD of Integrated Circuits and Systems, 37(3):545-558, 2018. [doi]
Abstract is missing.