Yifan YangGong, Sebastian Turullols, Daniel Woo, Changku Huang, King C. Yen, Venkatram Krishnaswamy, Kalon Holdbrook, Jinuk Luke Shin. Asymmetric Frequency Locked Loop (AFLL) for adaptive clock generation in a 28nm SPARC M6 processor. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, KaoHsiung, Taiwan, November 10-12, 2014. pages 373-376, IEEE, 2014. [doi]