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A low power NoC router using the marching memory through type

Ryota Yasudo, Takahiro Kagami, Hideharu Amano, Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura. A low power NoC router using the marching memory through type. In 2014 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVII, Yokohama, Japan, April 14-16, 2014. pages 1-3, IEEE, 2014. [doi]

Authors

Ryota Yasudo

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Takahiro Kagami

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Hideharu Amano

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Yasunobu Nakase

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Masashi Watanabe

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Tsukasa Oishi

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Toru Shimizu

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Tadao Nakamura

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