A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique

Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique. IEICE Electronic Express, 9(12):1023-1029, 2012. [doi]

Authors

Shusuke Yoshimoto

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Masaharu Terada

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Shunsuke Okumura

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Toshikazu Suzuki

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Shinji Miyano

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Hiroshi Kawaguchi

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Masahiko Yoshimoto

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