Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique. IEICE Electronic Express, 9(12):1023-1029, 2012. [doi]
@article{YoshimotoTOSMKY12-0,
title = {A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique},
author = {Shusuke Yoshimoto and Masaharu Terada and Shunsuke Okumura and Toshikazu Suzuki and Shinji Miyano and Hiroshi Kawaguchi and Masahiko Yoshimoto},
year = {2012},
doi = {10.1587/elex.9.1023},
url = {http://dx.doi.org/10.1587/elex.9.1023},
researchr = {https://researchr.org/publication/YoshimotoTOSMKY12-0},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {9},
number = {12},
pages = {1023-1029},
}