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Hiroyuki Yotsuyanagi, Hiroyuki Makimoto, Takanobu Nimiya, Masaki Hashizume. On Detecting Delay Faults Using Time-to-Digital Converter Embedded in Boundary Scan. IEICE Transactions, 96-D(9):1986-1993, 2013. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A Boundary Scan Circuit with Time-to-Digital Converter for Delay TestingHiroyuki Yotsuyanagi, Hiroyuki Makimoto, Masaki Hashizume. ats 2011: 539-544 [doi] Test Time Reduction on Testing Delay Faults in 3D ICs Using Boundary Scan DesignSatoshi Hirai, Hiroyuki Yotsuyanagi, Masaki Hashizume. ats 2018: 7-12 [doi]
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