The following publications are possibly variants of this publication:
- Power minimization of rotary clock designZhengtao Yu 0002, Xun Liu. socc 2005: 19-24 [doi]
- Low-Power Rotary Clock Array DesignZhengtao Yu, Xun Liu. tvlsi, 15(1):5-12, 2007. [doi]
- Efficient Power Network Analysis Considering Multidomain Clock GatingWanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng. tcad, 28(9):1348-1358, 2009. [doi]