X. Zeng, J. Guan, W. Q. Zhao, P. S. Tang, D. Zhou. A constraint-based placement refinement method for CMOS analog cell layout. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 408-411, IEEE, 1999. [doi]
@inproceedings{ZengGZTZ99,
title = {A constraint-based placement refinement method for CMOS analog cell layout},
author = {X. Zeng and J. Guan and W. Q. Zhao and P. S. Tang and D. Zhou},
year = {1999},
doi = {10.1109/ISCAS.1999.780181},
url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.1999.780181},
tags = {rule-based, layout, refinement, constraints},
researchr = {https://researchr.org/publication/ZengGZTZ99},
cites = {0},
citedby = {0},
pages = {408-411},
booktitle = {International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA},
publisher = {IEEE},
isbn = {0-7803-5471-0},
}