A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply

Kevin Zhang, Uddalak Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel Murray, Narendra Vallepalli, Yih Wang, Bo Zheng, Mark Bohr. A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply. J. Solid-State Circuits, 41(1):146-151, 2006. [doi]

Abstract

Abstract is missing.