The following publications are possibly variants of this publication:
- Investigation on the layout strategy of ggNMOS ESD protection devices for uniform conduction behavior and optimal width scalingGuangyi Lu, Yuan Wang, Lizhong Zhang, Jian Cao, Song Jia, Xing Zhang. chinaf, 58(4):1-9, 2015. [doi]
- Concept and extraction method of ESD-critical parameters for function-based layout-level ESD protection circuit design verificationRouying Zhan, Haigang Feng, Qiong Wu, Xiaokang Guan, Guang Chen, Haolu Xie, Albert Z. Wang. aspdac 2004: 710-712 [doi]
- ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanismRouying Zhan, Haigang Feng, Haolu Xie, Albert Z. Wang. iscas 2004: 217-220
- ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanismRouying Zhan, Haigang Feng, Qiong Wu, Haolu Xie, Xiaokang Guan, Guang Chen, Albert Z. Wang. tcad, 23(10):1421-1428, 2004. [doi]