Abstract is missing.
- Different scalabilities of N- and P-type tunnel field-effect transistors with Si/SiGe heterojunctionsNguyen Dang Chien, Nguyen Thi Thu, Chun-Hsing Shih, Luu The Vinh. 1-4 [doi]
- Extending HKMG scaling on CMOS with FDSOI: Advantages and integration challengesD. H. Triyoso, R. Carter, J. Kluth, K. Hempel, M. Gribelyuk, L. Kang, A. Kumar, B. Mulfinger, P. Javorka, K. Punchihewa, A. Child, T. McArdle, J. Holt, S. Straub, R. Sporer, P. Chen. 1-4 [doi]
- A 100-μW wake-up receiver for UHF transceiverPhong Nguyen Thanh, Khanh Nguyen Tuan, Xuan Mai Dong. 1-4 [doi]
- Exploration and evaluation of hybrid TFET-MOSFET monolithic 3D SRAMs considering interlayer couplingJian-Hao Wang, Yin-Nien Chen, Pin Su, Ching-Te Chuang. 1-4 [doi]
- Characterization of high pressure hydrogen annealing effect on polysilicon channel field effect transistors using isothermal deep level trap spectroscopyManh Cuong Nguyen, An Hoang-Thuy Nguyen, Jae-Won Choi, Soo-Yeun Han, Jung-Yeon Kim, Rino Choi, ChangHwan Choi. 1-4 [doi]
- Fast design exploration with unified HW/SW co-verification framework for high throughput wireless communication systemNana Sutisna, Reina Hongyo, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi. 1-4 [doi]
- A digitally controlled oscillator suitable for on-chip integration in 65 nm CMOSShanthi Sudalaiyandi, Gilles Masson, Mykhailo Zarudniev. 1-4 [doi]
- A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS processXuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham. 1-4 [doi]
- Soft-error resilient Network-on-Chip for safety-critical applicationsKhanh N. Dang, Yuichi Okuyama, Abderazek Ben Abdallah. 1-4 [doi]
- A compact, low power AES core on 180nm CMOS processVan-Lan Dao, Van-Phuc Hoang, Anh-Thai Nguyen, Quy-Minh Le. 1-5 [doi]
- Development of fundamental manufacturing processes for minimal fabSommawan Khumpuang, Shiro Hara. 1-4 [doi]
- An area compact soft error resident circuit for FPGAMotoki Amagasaki, Yuji Nakamura, Takuya Teraoka, Masahiro Iida, Toshinori Sueyoshi. 1-4 [doi]
- Conductive polymer/metal composite for flexible interconnectJin Kawakita, Toyohiro Chikyow. 1-4 [doi]
- A 200-mA CMOS low-dropout regulator with high current-efficient and transient-response improvementDinh Thuc Nguyen. 1-4 [doi]
- The design of a phase compensator for the CIC decimation filterKhanh Nguyen Quoc, Dong Bach Tuan, Toan Le Duc. 1-4 [doi]
- Highly reliable anti-fuse technology in sub-16nm technologies for security applicationsRick Shen, Hsin-Ming Chen, Meng-Yi Wu. 1-4 [doi]
- On-chip accurate primary-side output current estimator for flyback LED driver controlZong-You Hou, Teng-Wei Huang, Chua-Chin Wang. 1-4 [doi]
- An all-in-one debugger of 8-bit microcontroller with high transfer speedNguyen Hung Quan, Duong Hai Dang Linh, Trinh Viet Quang, Hoang Minh The Nghi, Nguyen Phu Quoc, Tran Kien Cuong, Hoang Xuan Hoa. 1-4 [doi]
- Register grouping for synthesis of clock gating logicInhak Han, Jonggyu Kim, Joonhwan Yi, Youngsoo Shin. 1-4 [doi]
- An ultra low power operated logic NVM for passive UHF RFID tag applicationsWu-Chang Chang, Po-Ching Wu, Cheng-Hao Po, Chun-fu Lin, Ching-Yuan Lin, Chih-Hsin Chen. 1-4 [doi]
- Improved electrical and thermal performances in nanostructured GaN devicesJun Ma, Elison Matioli. 1-4 [doi]
- Accuracy of Quasi-Monte Carlo technique in failure probability estimationsMichail Noltsis, Pieter Weckx, Dimitrios Rodopoulos, Francky Catthoor, Dimitrios Soudris. 1-4 [doi]
- La-doped ZrO2 based BEoL decoupling capacitorsWenke Weinreich, Konrad Seidel, Patrick Polakowski, M. Drescher, A. Gummenscheimer, Mark G. Nolan, L. Cheng, D. H. Triyoso. 1-4 [doi]
- Blue GaN based LED fabrication using hybrid process of the minimal photolithography system and MOCVDMasanori Iwata, Kenji Miyake, Nobuyoshi Yamauchi, Junko Kazusa. 1-4 [doi]
- A method of leakage reduction and slew-rate adjustment in 2×VDD output buffer for 28 nm CMOS technology and aboveTsung-Yi Tsai, Yan-You Chou, Chua-Chin Wang. 1-4 [doi]
- The implementation of HomePlug AV systemKo-Chi Kuo. 1-4 [doi]
- Ultra low-power and low-energy 32-bit datapath AES architecture for IoT applicationsDuy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigné, Xuan-Tu Tran. 1-4 [doi]
- A 4.2 mW 3.1 dBm IIP3 LNA in 0.13 μm CMOS for wideband communicationsBenqing Guo, Jun Chen, Haiyan Jin. 1-4 [doi]
- Organic complementary amplifier circuits with mixed dielectrics for large-area active collision detection sensorsToan Thanh Dao. 1-4 [doi]
- 71% Reducing the memory bandwidth requirement for a multi-standard video codec by lossless compression of video using a combination of 2D-DPCM and Variable Length CodingChi Lan Phuong Nguyen, My Phi Ngoc Nguyen, Hung Van Cao, Katsushige Matsubara, Keisuke Matsumoto, Seiji Mochizuki, Kenichi Iwata. 1-5 [doi]
- Scaling of split-gate flash memory and its adoption in modern embedded non-volatile applicationsNhan Do. 1-4 [doi]
- Recent advances in 3D VLSI integrationClaire Fenouillet-Béranger, Perrine Batude, L. Brunet, Vincent Mazzocchi, C.-M. V. Lu, Fabien Deprat, J. Micout, M.-P. Samson, Bernard Previtali, P. Besombes, N. Rambal, François Andrieu, Olivier Billoint, M. Brocard, Sebastien Thuries, Gerald Cibrario, Maud Vinet. 1-4 [doi]
- An assessment on low-voltage low-power integrated single transistor active inductor design for RF filter applicationsVincenzo Stornelli, Leonardo Pantoli, Giorgio Leuzzi, A. Leoni. 1-4 [doi]
- Preliminary results on TFET - Gated diode in thin silicon film for IO design & ESD protection in 28nm UTBB FD-SOI CMOS technologyPhilippe Galy, S. Athanasiou. 1-4 [doi]
- Placement optimization for MP-DSAL compliant layoutSeongbo Shim, Woohyun Chung, Youngsoo Shin. 1-4 [doi]
- Layout dependent BTI and HCI degradation in nano CMOS technology: A new time-dependent LDE and impacts on circuit at end of lifePengpeng Ren, Runsheng Wang, Ru Huang. 1-3 [doi]
- A 65-nm CMOS high-efficiency PWM/PFM Buck Converter with Bypass mode for Transceiver applicationsDuy Dang, Thang Tran Quoc, Kien Nguyen Van. 1-4 [doi]
- Packaging in minimal fab: An integrated semiconductor line from wafer process to packaging processMichihiro Inoue, Fumito Imura, Arami Saruwatari, Shiro Hara. 1-3 [doi]
- Beyond-Si materials and devices for more Moore and more than Moore applicationsNadine Collaert, A. Alian, H. Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, D. Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, M. Schaekers, A. Sibaya-Hernandez, S. Sioncke, Q. Smets, Abhitosh Vais, A. Vandooren, A. Veloso, A. Verhulst, D. Verreck, N. Waldron, A. Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean. 1-5 [doi]
- Dynamic CMOS-rectifying memristor multiplier architecture for power reductionMinh-Huan Vo. 1-4 [doi]
- The design of a phase compensator for the CIC decimation filterKhanh Nguyen Quoc, Dong Bach Tuan, Toan Le Duc. 1-4 [doi]