Table of Contents

• Keynote: Wireless networks... what does the future have in store?Louis Christodoulides. 1 [doi]
• Selecting long atomic traces for high coverageRoni Rosner, Micha Moffie, Yiannakis Sazeides, Ronny Ronen. 2-11 [doi]
• Recycling waste: exploiting wrong-path execution to improve branch predictionHaitham Akkary, Srikanth T. Srinivasan, Konrad Lai. 12-21 [doi]
• Partitioned first-level cache design for clustered microarchitecturesPaul Racunas, Yale N. Patt. 22-31 [doi]
• A fast approximate interprocedural analysis for speculative multithreading compilersAnasua Bhowmik, Manoj Franklin. 32-41 [doi]
• Compiler support for efficient processing of XML datasetsXiaogang Li, Renato Ferreira, Gagan Agrawal. 42-52 [doi]
• A framework for incremental extensible compiler constructionSteven Carroll, Constantine D. Polychronopoulos. 53-62 [doi]
• A performance analysis of the Berkeley UPC compilerParry Husbands, Costin Iancu, Katherine A. Yelick. 63-73 [doi]
• Keynote: Is there anything more to learn about high performance processors?James E. Smith. 75 [doi]
• A compiler approach for reducing data cache energyWei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen. 76-85 [doi]
• Conserving disk energy in network serversEnrique V. Carrera, Eduardo Pinheiro, Ricardo Bianchini. 86-97 [doi]
• PowerHerd: dynamic satisfaction of peak power constraints in interconnection networksLi Shang, Li-Shiuan Peh, Niraj K. Jha. 98-108 [doi]
• Predictive dynamic thermal management for multimedia applicationsJayanth Srinivasan, Sarita V. Adve. 109-120 [doi]
• Evaluation of the memory page migration influence in the system performance: the case of the SGI O2000Julita Corbalán, Xavier Martorell, Jesús Labarta. 121-129 [doi]
• Modeling and optimization of non-blocking checkpointing for optimistic simulation on myrinet clustersFrancesco Quaglia, Andrea Santoro. 130-139 [doi]
• Performance characteristics of openMP constructs, and application benchmarks on a large symmetric multiprocessorNathan R. Fredrickson, Ahmad Afsahi, Ying Qian. 140-149 [doi]
• Estimating cache misses and locality using stack distancesCalin Cascaval, David A. Padua. 150-159 [doi]
• AEGIS: architecture for tamper-evident and tamper-resistant processingG. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas. 160-171 [doi]
• Reducing register ports using delayed write-back queues and operand pre-fetchNam Sung Kim, Trevor N. Mudge. 172-182 [doi]
• Predicate prediction for efficient out-of-order executionWeihaw Chuang, Brad Calder. 183-192 [doi]
• A GSA-based compiler infrastructure to extract parallelism from complex loopsManuel Arenaz, Juan Touriño, Ramon Doallo. 193-204 [doi]
• The impact of data dependence analysis on compilation and program parallelizationKleanthis Psarris, Konstantinos Kyriakopoulos. 205-214 [doi]
• Inter-procedural stacked register allocation for itanium® like architectureLiu Yang, Sun Chan, Guang R. Gao, Roy Ju, Guei-Yuan Lueh, Zhaoqing Zhang. 215-225 [doi]
• Result checking in global computing systemsCécile Germain-Renaud, Nathalie Playez. 226-233 [doi]
• Collective operations in application-level fault-tolerant MPIGreg Bronevetsky, Daniel Marques, Keshav Pingali, Paul Stodghill. 234-243 [doi]
• Placement of I/O servers to improve parallel I/O performance on switch-based clustersJan-Jan Wu, Da-Wei Wang, Yih-Fang Lin. 244-251 [doi]
• Profile-guided I/O partitioningYijian Wang, David R. Kaeli. 252-260 [doi]
• miNI: reducing network interface memory requirements with dynamic handle lookupReza Azimi, Angelos Bilas. 261-272 [doi]
• Inferential queueing and speculative push for reducing critical communication latenciesRavi Rajwar, Alain Kägi, James R. Goodman. 273-284 [doi]
• Automatic fence insertion for shared memory multiprocessingXing Fang, Jaejin Lee, Samuel P. Midkiff. 285-294 [doi]
• High performance RDMA-based MPI implementation over InfiniBandJiuxing Liu, Jiesheng Wu, Sushmitha P. Kini, Pete Wyckoff, Dhabaleswar K. Panda. 295-304 [doi]
• A new speculation technique to optimize floating-point performance while preserving bit-by-bit reproducibilityMikio Takeuchi, Hideaki Komatsu, Toshio Nakatani. 305-315 [doi]
• Dynamic memory instruction bypassingDaniel Ortega, Eduard Ayguadé, Mateo Valero. 316-325 [doi]
• Enhancing memory level parallelism via recovery-free value predictionHuiyang Zhou, Thomas M. Conte. 326-335 [doi]
• Enhancing scalability of parallel structured AMR calculationsAndrew M. Wissink, David Hysom, Richard D. Hornung. 336-347 [doi]
• A high performance multi-perspective vision studioEugene Borovikov, Alan Sussman. 348-357 [doi]
• ::::Roccom::::: an object-oriented, data-centric software integration framework for multiphysics simulationsXiangmin Jiao, Michael T. Campbell, Michael T. Heath. 358-368 [doi]