Abstract is missing.
- Thermal Neutron-induced SEUs on a COTS 28-nm SRAM-based FPGA under Different Incident AnglesJuan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente. 1-6 [doi]
- SET Mitigation Techniques on Mirror Full Adder at 7 nm FinFET TechnologyRafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis 0001, Cristina Meinhardt. 1-2 [doi]
- Investigation of Single Event Effects in a Resistive RAM memory array by SPICE level simulationKarine Coulié, Hassen Aziza, Wenceslas Rahajandraibe. 1-6 [doi]
- TLP Generator Setup for Reliable Switching Characterization of Commercial GaN HEMTsCarlos Bernal, Manuel Jiménez, Fabio Andrade 0001. 1-3 [doi]
- Pros and Cons of Fault Injection Approaches for the Reliability Assessment of Deep Neural NetworksAnnachiara Ruospo, Lucas Matana Luza, Alberto Bosio, Marcello Traiola, Luigi Dilillo, Ernesto Sánchez 0001. 1-5 [doi]
- Reliability Evaluation of Voters for Fault Tolerant Approximate SystemsTiago R. Balen, Carlos J. Gonzalez, Ingrid F. V. Oliveira, Rafael B. Schvittz, Nemitala Added, Eduardo L. A. Macchione, Vitor A. P. de Aguiar, Marcilei A. Guazzelli, Nilberto H. Medina, Paulo F. Butzen. 1-6 [doi]
- Evaluating the Impact of Process Variation on RRAMsE. Brum, Moritz Fieback, Thiago Santos Copetti, H. Jiayi, Said Hamdioui, Fabian Vargas 0001, Letícia Maria Veiras Bolzani. 1-6 [doi]
- Exploring Gate Mapping and Transistor Sizing to Improve Radiation Robustness: A C17 Benchmark Case-studyBernardo Borges Sandoval, Leonardo Heitich Brendler, Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Ricardo Reis 0001, Cristina Meinhardt. 1-6 [doi]
- Reliability Evaluation of RISC-V and ARM Microprocessors Through a New Fault Injection ToolAlexander Aponte-Moreno, Felipe Restrepo-Calle, Cesar Augusto Pedraza. 1-6 [doi]
- Comparing different solutions for testing resistive defects in low-power SRAMsNunzio Mirabella, Michelangelo Grosso, Giovanna Franchino, Salvatore Rinaudo, Ioannis Deretzis, Antonino La Magna, Matteo Sonza Reorda. 1-6 [doi]
- Evaluation of Attitude Estimation Algorithm under Soft Error EffectsJ. P. Brum, T. Kraemer Sartori, J. Lin, Matheus Garay Trindade, H. Fourati, Raoul Velazco, Rodrigo Possamai Bastos. 1-5 [doi]
- Towards SAT-Based SBST Generation for RISC-V CoresTobias Faller, Philipp Scholl, Tobias Paxian, Bernd Becker 0001. 1-2 [doi]
- Nanosatellite On-Board Computer including a Many-Core ProcessorFabrice Pancher, Vanessa Vargas, Pablo Ramos, Rodrigo Possamai Bastos, David César Ardiles Saravia, Raoul Velazco. 1-6 [doi]