Abstract is missing.
- An Accurate Instruction-Level Energy Consumption Model for Embedded RISC ProcessorsSheayun Lee, Andreas Ermedahl, Sang Lyul Min, Naehyuck Chang. 1-10
- Hybrid Run-time Power Management Technique for Real-time Embedded System with Voltage Scalable ProcessorMinyoung Kim, Soonhoi Ha. 11-19
- Power-Aware Design Synthesis Techniques for Distributed Real-Time SystemsDong-In Kang, Stephen P. Crago, Jinwoo Suh. 20-28
- Combining Global Code and Data CompactionBjorn De Sutter, Bruno De Bus, Koenraad De Bosschere, Saumya K. Debray. 29-38
- Register Allocation for Banked Register FileJinpyo Park, Je-Hyung Lee, Soo-Mook Moon. 39-47
- Loop Transformations for Architectures with Partitioned Register BanksXianglong Huang, Steve Carr, Philip H. Sweany. 48-55
- ENSEMBLE: A Communication Layer for Embedded Multi-Processor SystemsSidney Cadot, Frits Kuijlman, Koen Langendoen, Kees van Reeuwijk, Henk J. Sips. 56-63
- Embedded Control Systems Development with GiottoThomas A. Henzinger, Benjamin Horowitz, Christoph M. Kirsch. 64-72
- A Tool for Simulation and Fast Prototyping of Embedded Control SystemsLuigi Palopoli, Giuseppe Lipari, Luca Abeni, Marco Di Natale, Paolo Ancilotti, Fabio Conticelli. 73-81
- MILAN: A Model Based Integrated Simulation Framework for Desgin of Embedded SuystemsAmol Bakshi, Viktor K. Prasanna, Ákos Lédeczi. 82-87
- Parametric Timing AnalysisEmilio Vivancos, Christopher A. Healy, Frank Mueller, David B. Whalley. 88-93
- Interval-Based Analysis of Software ProcessesDirk Ziegenbein, Fabian Wolf, Kai Richter, Marek Jersak, Rolf Ernst. 94-101
- Automatic Accurate Live Memory Analysis for Garbage-Collected LanguagesLeena Unnikrishnan, Scott D. Stoller, Yanhong A. Liu. 102-111
- Generating Decision Trees for Decoding BinariesHenrik Theiling. 112-120
- Dealing with Hardware in Embedded Software: A General Framework Based on the Devil LanguageFabrice Mérillon, Gilles Muller. 121-127
- Morphable Cache Architectures: Potential BenefitsIsmail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam. 128-137
- Software Pipelining Irregular Loops on the TMS320C6000 VLIW DSP ArchitectureElana D. Granston, Eric Stotzer, Joe Zbiciak. 138-144
- ILP-based Instruction Scheduling for IA-64Daniel Kästner, Sebastian Winkel. 145-154
- C Compiler Design for an Industrial Network ProcessorJens Wagner, Rainer Leupers. 155-164
- A Dynamic Programming Approach to Optimal Integrated Code GenerationChristoph W. Keßler, Andrzej Bednarski. 165-174
- Stuck in the Middle: Challenges and Trends in Optimizing MiddlewareDaniel M. Yellin. 175-180
- Optimizing Component InteractionMark N. Wegman, Karin Högstedt, Doug Kimelman, V. T. Rajan, Tova Roth, Nan Wang. 181-181
- Using Cohort Scheduling to Enhance Server Performance (Extended Abstract)James R. Larus, Michael Parkes. 182-187
- Middleware For Building Adaptive Systems Via ConfigurationSanjai Narain, Ravichander Vaidyanathan, Stanley Moyer, William Stephens, Kirthika Parmeswaran, Abdul-Rahim Shareef. 188-195
- Designing and Optimizing a Scalable CORBA Notification ServicePradeep Gore, Ron Cytron, Douglas C. Schmidt, Carlos O Ryan. 196-204
- Issues in the Design of Adaptive Middleware Load BalancingOssama Othman, Douglas C. Schmidt. 205-213
- Evaluating and Optimizing Thread Pool Strategies for Real-Time CORBAIrfan Pyarali, Marina Spivak, Ron Cytron, Douglas C. Schmidt. 214-222
- Designing an Efficient and Scalable Server-side Asynchrony Model for CORBADarrell Brunsch, Carlos O Ryan, Douglas C. Schmidt. 223-229
- Integration of QoS-Enabled Distributed Object Computing Middleware for Developing Next-Generation Distributed ApplicationYamuna Krishnamurthy, Vishal Kachroo, David A. Karr, Craig Rodrigues, Joseph P. Loyall, Richard E. Schantz, Douglas C. Schmidt. 230-237
- Language and Compiler Support for Adaptive Distributed ApplicationsVikram S. Adve, Vinh Vi Lam, Brian Ensink. 238-246