Abstract is missing.
- SmashClean: A hardware level mitigation to stack smashing attacks in OpenRISCManaar Alam, Debapriya Basu Roy, Sarani Bhattacharya, Vidya Govindan, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay. 1-4 [doi]
- Keynote talk I: How to prove hybrid systemsAndré Platzer. 1 [doi]
- Formal feature analysis of hybrid automataAntonio Anastasio Bruto da Costa, Pallab Dasgupta, Goran Frehse. 2-11 [doi]
- Parallel reachability analysis for hybrid systemsAmit Gurung, Arup Deka, Ezio Bartocci, Sergiy Bogomolov, Radu Grosu, Rajarshi Ray. 12-22 [doi]
- Control-flow guided property directed reachability for imperative synchronous programsXian Li, Klaus Schneider 0001. 23-33 [doi]
- A computer-algebraic approach to formal verification of data-centric low-level softwareOliver Marx, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz. 34-42 [doi]
- Verifying the concentration property of permutation networks by BDDsTripti Jain, Klaus Schneider 0001. 43-53 [doi]
- Combining type-checking with model-checking for system verificationZhiqiang Ren, Hongwei Xi. 54-58 [doi]
- Formal engineering frameworks in maritime domain awarenessAmir Yaghoubi Shahir, Uwe Glässer, Hamed Yaghoubi Shahir, Mohammad A. Tayebi, Hans Wehn. 59-64 [doi]
- Frame conditions in symbolic representations of UML/OCL modelsNils Przigoda, Jonas Gomes Filho, Philipp Niemann, Robert Wille, Rolf Drechsler. 65-70 [doi]
- Towards integrating statistical model checking into property-based testingBernhard K. Aichernig, Richard Schumi. 71-76 [doi]
- Keynote talk II: Multiform logical time for Me/Mo-codesignRobert de Simone. 77 [doi]
- Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE modelsJudith Peters, Nils Przigoda, Robert Wille, Rolf Drechsler. 78-84 [doi]
- Specification of precise timing in synchronous dataflow modelsPatricia Derler, Kaushik Ravindran, Rhishikesh Limaye. 85-94 [doi]
- Specification, verification, and synthesis using extended state machines with callbacksFarhaan Fowze, Tuba Yavuz. 95-104 [doi]
- Performance-aware scheduling of multicore time-critical systemsJalil Boudjadar, Jin Hyun Kim, Simin Nadjm-Tehrani. 105-114 [doi]
- Accelerating schedule space exploration of multi-threaded programs with GPUsPrakhar Banga, Atul Pai, Subhajit Roy, Mainak Chaudhuri. 115-124 [doi]
- MEMOCODE 2016 design contest: K-means clusteringPeter Milder. 125-127 [doi]
- Keynote talk III: Trusted cloud: How to make the cloud more secureSriram Rajamani. 132 [doi]
- Verification of component architectures using mode-based contractsStefan Kugele, Diego Marmsoler, Nuria Mata, Kai Werther. 133-142 [doi]
- Optimal compilation for exposed datapath architectures with buffered processing units by SAT solversAnoop Bhagyanath, Klaus Schneider 0001. 143-152 [doi]
- A formal approach to the mapping of tasks on an heterogenous multicore, energy-aware architectureEmilien Kofman, Robert de Simone. 153-162 [doi]
- Asynchrony-aware static analysis of Android applicationsAshish Mishra, Aditya Kanade, Y. N. Srikant. 163-172 [doi]
- Step revision in hybrid Co-simulation with FMIFabio Cremona, Marten Lohstroh, David Broman, Marco Di Natale, Edward A. Lee, Stavros Tripakis. 173-183 [doi]
- An efficient algorithm for monitoring practical TPTL specificationsAdel Dokhanchi, Bardh Hoxha, Cumhur Erkan Tuncali, Georgios E. Fainekos. 184-193 [doi]