Bhanu Kapoor - researchr alias

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Viewing Publication 1 - 12 from 12

2011

Power Management Design and VerificationBhanu Kapoor, Shireesh Verma. jolpe, 7(1):41-48, 2011. [doi]

Embedded tutorial: Addressing critical power management verification issues in low power designsBhanu Kapoor, Knut M. Just. date 2011: 124 [doi]

2009

Validating physical access layer of WiMAX using SystemVerilogAlbert Chiang, Wei-Hua Han, Bhanu Kapoor. isqed 2009: 356-359 [doi]

Special Session 11C: Embedded Tutorial: System-on-a-Chip Power Management Implications on Validation and TestingBhanu Kapoor. vts 2009: 333 [doi]

Impact of SoC power management techniques on verification and testingBhanu Kapoor, Shankar Hemmady, Shireesh Verma, Kaushik Roy, Manuel A. d Abreu. isqed 2009: 692-695 [doi]

2008

Tutorial: SoC Power Management Verification and Testing IssuesBhanu Kapoor, J. Marc Edwards, Shankar Hemmady, Shireesh Verma, Kaushik Roy. mtv 2008: 67-72 [doi]

Panel: SoC power management implications on validation and testingBhanu Kapoor, John Goodenough, Shankar Hemmady, Shireesh Verma, Manuel A. d'Abreu, Kaushik Roy. hldvt 2008: 135-137 [doi]

1998

Low Power Memory Architectures for Video ApplicationsBhanu Kapoor. glvlsi 1998: 2-6 [doi]

Low-power data transfer and storage exploration for H.263 video decoder systemLode Nachtergaele, Francky Catthoor, Bhanu Kapoor, Stefan Janssens, Dennis Moolenaar. jsac, 16(1):120-129, 1998. [doi]

1996

Improving Path Sensitizability of Combinational CircuitsBhanu Kapoor, V. S. S. Nair. vlsi, 5(1):49-57, 1996. [doi]

1994

Improving the Accuracy of Circuit Activity MeasurementBhanu Kapoor. dac 1994: 734-739 [doi]

Area, performance, and sensitizable paths [logic design]Bhanu Kapoor, V. S. S. Nair. glvlsi 1994: 222-227 [doi]

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