Christopher T. Clarke - researchr alias

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Viewing Publication 1 - 20 from 20

2020

An OpenGL Compliant Hardware Implementation of a Graphic Processing Unit Using Field Programmable Gate Array-System on Chip TechnologyAlexander E. Beasley, Christopher T. Clarke, Robert J. Watson. trets, 14(1), 2020. [doi]

2019

Efficient digital implementation of a multi-precision square-root algorithmAlexander E. Beasley, Robert J. Watson, Christopher T. Clarke. iet-cdt, 13(2):110-117, 2019. [doi]

2018

Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC DesignAlok Prakash, Christopher T. Clarke, Siew Kei Lam, Thambipillai Srikanthan. tvlsi, 26(3):445-456, 2018. [doi]

2014

Improved Signal Processing Methods for Velocity Selective Neural Recording Using Multi-Electrode CuffsAssad I. Al-Shueli, Christopher T. Clarke, Nick Donaldson, John Taylor. tbcas, 8(3):401-410, 2014. [doi]

Exploiting FPGA-Aware Merging of Custom Instructions for Runtime ReconfigurationSiew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan. trets, 7(3):26, 2014. [doi]

Rapid evaluation of custom instruction selection approaches with FPGA estimationSiew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke. tecs, 13(4):75, 2014. [doi]

2013

Modelling communication overhead for accessing local memories in hardware acceleratorsAlok Prakash, Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke. asap 2013: 31-34 [doi]

FPGA-aware techniques for rapid generation of profitable custom instructionsAlok Prakash, Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan. mam, 37(3):259-269, 2013. [doi]

2012

Exploiting FPGA-aware merging of custom instructions for runtime reconfigurationSiew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke. recosoc 2012: 1-8 [doi]

Custom instructions with local memory elements without expensive DMA transfersAlok Prakash, Christopher T. Clarke, Thambipillai Srikanthan. fpl 2012: 647-650 [doi]

Examination of the concept of a row-column separated median filterDi Wang, Christopher T. Clarke, A. N. Evans. fpl 2012: 659-662 [doi]

2011

Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAsSiew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke. TC, 60(5):680-692, 2011. [doi]

Instruction set customization for area-constrained FPGA designsAlok Prakash, Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan. socc 2011: 329-334 [doi]

2009

Selecting Profitable Custom Instructions for Area-Time-Efficient Realization on Reconfigurable ArchitecturesSiew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke. tie, 56(10):3998-4005, 2009. [doi]

2008

Analogue/digital interface and communications aspects in a multi-channel ENG recording asicChristopher T. Clarke, John T. Taylor, Xianhong Xu. iscas 2008: 1116-1119 [doi]

2007

Real Time Tracking of Camera Motion Through Cylindrical PassagesSuchitra Sathyanarayana, Srikanthan Thambipillai, Christopher T. Clarke. icdsp 2007: 455-458 [doi]

2006

Rapid generation of custom instructions using predefined dataflow structuresSiew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke. mam, 30(6):355-366, 2006. [doi]

Profile Directed Instruction Cache Tuning for Embedded SystemsKugan Vivekanandarajah, Thambipillai Srikanthan, Christopher T. Clarke. isvlsi 2006: 277-282 [doi]

2003

Static Pattern Predictor (SPP) Based Low Power Instruction Cache DesignKugan Vivekanandarajah, Thambipillai Srikanthan, Christopher T. Clarke, Saurav Bhattacharyya. csreaESA 2003: 210-215

1998

Designing efficient residue arithmetic based VLSI correlatorsAniruddha A. Deodhar, Manish Bhardwaj, Christopher T. Clarke, Thambipillai Srikanthan. icassp 1998: 3021-3024 [doi]

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