Abstract is missing.
- Fault Modeling and Test Generation for FPGAsMichael Hermann, Wolfgang Hoffmann. 1-10
- A Test Methodology Applied to Cellular Logic Programmable Gate ArraysRicardo de Oliveira Duarte, Michael Nicolaidis. 11-22
- Integrated Layout Synthesis for FPGAsMichal Servít, Zdenek Muzikár. 23-33
- Influence of Locig Block Layout Architecture on FPGA PerformanceMichel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne. 34-44
- A Global Routing Heuristic for FPGAs Based on Mean Field AnnealingIsmail Haritaoglu, Cevdet Aykanat. 45-56
- Power Dissipation Driven FPGA Place and Route Under Delay ConstraintsKaushik Roy, Sharat Prasad. 57-65
- FPGA Technology Mapping for Power MinimizationAmir H. Farrahi, Majid Sarrafzadeh. 66-77
- Specification and Synthesis of Complex Arithmetic Operators for FPGAsHans-Jürgen Brand, Dietmar Mueller, Wolfgang Rosenstiel. 78-88
- A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAsToshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta. 89-98
- An Efficient Technique for Mapping RTL Structures onto FPGAsA. R. Naseer, M. Balakrishnan, Anshul Kumar. 99-110
- A Testbench Design Method Suitable for FPGA-Based Prototyping of Reactive SystemsVolker Hamann. 111-113
- Using Consensusless Covers for Fast Operating on Boolean FunctionsEugene Goldberg, Ludmila Krasilnikova. 114-116
- Formal Verification of Timing Rules in Design SpecificationsTibor Bartos, Norbert Fristacky. 117-119
- Optimized Synthesis of Self-Testable Finite State Machines (FSM) Using BIST-PST Structures in Altera StructuresAndrzej Hlawiczka, Jacek Binda. 120-122
- A High-Speed Rotation ProcessorJan Lichtermann, Günter Neustädter. 123-125
- The MD5 Message-Digest Algorithm in the XILINX FPGAP. Gramata, P. Trebaticky, Elena Gramatová. 126-128
- A Reprogrammable Processor for Fractal Image CompressionBarry S. Fagin, Pichet Chintrakulchai. 129-131
- Implementing GCD Systolic Arrays on FPGATudor Jebelean. 132-134
- Formal CAD Techniques for Safety-Critical FPGA Design and Deployment in Embedded SubsystemsRoger B. Hughes, Gerry Musgrave. 135-137
- Direct Sequence Spread Spectrum Digital Radio DSP Prototyping Using Xilinx FPGAsT. Saluvere, D. Kerek, Hannu Tenhunen. 138-140
- FPGA Based Reconfigurable Architecture for a Compact Vision SystemR. Nguyen, P. Nguyen. 141-143
- A New FPGA Architecture for Word-Oriented DatapathsReiner W. Hartenstein, Rainer Kress, Helmut Reinig. 144-155
- Image Processing on a Custom Computing PlatformPeter M. Athanas, A. Lynn Abbott. 156-167
- A Superscalar and Reconfigurable ProcessorChristian Iseli, Eduardo Sanchez. 168-174
- A Fast FPGA Implementation of a General Purpose NeuronValentina Salapura, Michael Gschwind, Oliver Maischberger. 175-182
- Data-Procedural Languages for FPL-based MachinesAndreas Ast, Jürgen Becker, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt. 183-195
- Implementing On Line Arithmetic on PAMMarc Daumas, Jean-Michel Muller, Jean Vuillemin. 196-207
- Software Environment for WASMII: a Data Driven Machine with a Virtual HardwareXiao-Yu Chen, Xiao-ping Ling, Hideharu Amano. 208-219
- Constraint-based Hierarchical Placement of Parallel ProgramsMat Newman, Wayne Luk, Ian Page. 220-229
- ZAREPTA: A Zero Lead-Time, All Reconfigurable System for Emulation, Prototyping and Testing of ASICsTormod Njølstad, Johnny Pihl, Jø Hofstad. 230-239
- Simulating Static and Dynamic Faults in BIST Strucutres with a FPGA Based EmulatorRichard W. Wieler, Zaifu Zhang, Robert D. McLeod. 240-250
- FPGA Based Prototyping for Verification and Evaluation in Hardware-Software CosynthesisThomas Benner, Rolf Ernst, Ingo Könenkamp, Ulrich Holtmann, P. Schüler, H.-C. Schaub, N. Serafimov. 251-258
- FPGA Based Low Cost Generic Reusable Module for the Rapid Prototyping of SubsystemsApostolos Dollas, Brent Ward, J. D. Sterling Babcock. 259-270
- FPGA Development Tools: Keeping Pace with Design ComplexityBradly K. Fawcett, Steven H. Kelem. 271-273
- Meaningful Benchmarks for Logic Optimization of Table-Lookup FPGAsSteven H. Kelem. 274-276
- Educational Use of Field Programmable Gate ArraysDavid C.-L. Lam. 277-279
- HardWire: A Risk-Free FPGA-to-ASIC Migration PathBradly K. Fawcett, Nick Sawyer, Tony Williams. 280-282
- Reconfigurable Hardware from Programmable Logic DevicesNigel Toon. 283-285
- On some Limits of XILINX Based Control Logic ImplementationsAttila Katona, Péter Szolgay. 286-288
- Experiences of Using XBLOX for Implementing a Digital Filter AlgorithmGerhard Cadek, Peter C. Thorwartl, Georg P. Westphal. 289-291
- Continuous Interconnect Provides Solution to Density/Performance Trade-Off in Programmable LogicNigel Toon. 292-294
- A High Density Complex PLD Family Optimized for Flexibility, Predictability and 100 RoutabilityOm P. Agrawal. 295-297
- Design Experience with Fine-Grained FPGAsPatrick Lysaght, David McConnell, Hugh Dick. 298-302
- FPGA Routing Structures from Real CircuitsAndrew Leaver. 303-305
- A Tool-Set for Simulating Altera-PLDs Using VHDLAndré Klindworth. 306-308
- A CAD Tool for the Development of an Extra-Fast Fuzzy Logic Controller Based on FPGAs and Memory ModulesJohn Ant. Hallas, Evaggelinos P. Mariatos, Michael K. Birbas, Alexios N. Birbas, Constantinos E. Goutis. 309-311
- A Design Environment with Emulation of Prototypes for Hardware/Software Systems Using XILINX FPGAGerd vom Bögel, Petra Nauber, Jörg Winkler. 315-317
- DSP Development with Full-Speed Prototyping Based on HW/SW Codesign TechniquesJouni Isoaho, Axel Jantsch, Hannu Tenhunen. 318-320
- Performance Characteristics of the Monte-Carlo Clustering Processor (MCCP) - a Field Programmable Logic- based Custom Computing MachineC. P. Cowen, S. Monaghan. 321-314
- The Architecture of a General-Purpose Processor CellJirí Danecek, Alois Pluhácek, Michal Servít. 321-325
- The Design of a Stack-Based MicroprocessorMichael Gschwind, Christian Mautner. 326-331
- Implementation and Performance Evaluation of an Image Pre-Processing Chain on FPGAMohamed Akil, Marcelo Alves de Barros. 332-334
- Signature Testability of PLAE. P. Kalosha, Vyacheslav N. Yarmolik, Mark G. Karpovsky. 335-337
- A FPL Prototyping Package with a C++ Interface for the PC BusIbrahim bin Mat, James M. Noras. 338-340
- Design of Safety Systems Using Field Programmable Gate ArraysJuan J. Rodríguez-Andina, J. Alvarez, Enrique Mandado. 341-343
- A Job Dispatcher-Collector Made of FPGAs for a Centralized Voice serverJ. C. Debize, René J. Glaise. 344-351
- An Optoelectronic 3-D Field Programmable Gate ArrayJo Depreitere, Henk Neefs, Herwig Van Marck, Jan Van Campenhout, Roel Baets, Bart Dhoedt, Hugo Thienpont, Irina Veretennicoff. 352-360
- On Channel Architecture and Routability for FPGAs Under Faulty ConditionsKaushik Roy, Sudip Nag. 361-372
- Hight-Performance Datapath Implementation on Field-Programmable Multi-Chip Module (FPMCM)Tsuyoshi Isshiki, Wayne Wei-Ming Dai. 373-384
- A Laboratory for a Digital Design Course Using FPGAsStephan W. Gehring, Stefan H.-M. Ludwig, Niklaus Wirth. 385-396
- COordinate Rotation DIgital Computer (CORDIC) Synthesis for FPGAUwe Meyer-Bäse, Anke Meyer-Bäse, W. Hilberg. 397-408
- MARC: A Macintosh NUBUS-Expansion Board Based Reconfigurable Test System for Validating Communication SystemsGeorg J. Kempa, Peter Rieger. 409-420
- Artificial Neural Network Implementation on a Fine-Grained FPGAPatrick Lysaght, Jon Stockwood, J. Law, D. Girma. 421-432