Table of Contents

• Energy efficient computing: From milliwatt to megawattFeng Zhao. 1 [doi]
• Holistic approach to low-power system designCheng-Wen Wu. 2 [doi]
• Compiler assisted dynamic register file in GPGPUNaifeng Jing, Haopeng Liu, Yao Lu, Xiaoyao Liang. 3-8 [doi]
• An energy efficient GPGPU memory hierarchy with tiny incoherent cachesAlamelu Sankaranarayanan, Ehsan K. Ardestani, José Luis Briz, Jose Renau. 9-14 [doi]
• Design and analysis of 3D IC-based low power stereo matching processorsSeung Ho Ok, Kyeong-Ryeol Bae, Sung Kyu Lim, Byungin Moon. 15-20 [doi]
• Design and analysis of ultra low power processors using sub/near-threshold 3D stacked ICsSandeep Kumar Samal, Yarui Peng, Yang Zhang, Sung Kyu Lim. 21-26 [doi]
• Automated checkpointing for enabling intensive applications on energy harvesting devicesAzalia Mirhoseini, Ebrahim M. Songhori, Farinaz Koushanfar. 27-32 [doi]
• SIMES: A simulator for hybrid electrical energy storage systemsSiyu Yue, Di Zhu, Yanzhi Wang, Massoud Pedram, Younghyun Kim, Naehyuck Chang. 33-38 [doi]
• Power mapping and modeling of multi-core processorsKapil Dev, Abdullah Nazma Nowroz, Sherief Reda. 39-44 [doi]
• Early detection of current hot spots in power gated designsDipanjan Sengupta, Erhan Ergin, Andreas G. Veneris. 45-50 [doi]
• A 40 nm 0.32 V 3.5 MHz 11T single-ended bit-interleaving subthreshold SRAM with data-aware write-assistYi-Wei Chiu, Yu-Hao Hu, Ming-Hsien Tu, Jun-Kai Zhao, Shyh-Jye Jou, Ching-Te Chuang. 51-56 [doi]
• SRAM cell optimization for low AVT transistorsLawrence T. Clark, Samuel Leshner, George Tien. 57-63 [doi]
• Multi-level magnetic RAM using domain wall shift for energy-efficient, high-density cachesMrigank Sharad, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy. 64-69 [doi]
• A framework of concurrent task scheduling and dynamic voltage and frequency scaling in real-time embedded systems with energy harvestingXue Lin, Yanzhi Wang, Siyu Yue, Naehyuck Chang, Massoud Pedram. 70-75 [doi]
• Energy minimization for fault tolerant real-time applications on multiprocessor platforms using checkpointingQiushi Han, Ming Fan, Gang Quan. 76-81 [doi]
• Characterizing and evaluating voltage noise in multi-core near-threshold processorsXuan Zhang, Tao Tong, Svilen Kanev, Sae Kyu Lee, Gu-Yeon Wei, David Brooks. 82-87 [doi]
• Maximum power transfer tracking in a solar USB charger for smartphonesSangyoung Park, Bumkyu Koh, Yanzhi Wang, Jaemin Kim, Younghyun Kim, Massoud Pedram, Naehyuck Chang. 88-93 [doi]
• A statistical model of cell-to-cell variation in Li-ion batteries for system-level designDonghwa Shin, Massimo Poncino, Enrico Macii, Naehyuck Chang. 94-99 [doi]
• Chameleon: Adapting throughput server to time-varying green power budget using online learningChao Li, Xian Li, Rui Wang 0014, Tao Li, Nilanjan Goswami, Depei Qian. 100-105 [doi]
• Content-driven adaptive computation offloading for energy-aware hybrid distributed video codingMuhammad Shafique, Muhammad Usman Karim Khan, Jörg Henkel. 106-113 [doi]
• Update rate tradeoffs for improving online power modeling in smartphonesFrank Maker III, Rajeevan Amirtharajah, Venkatesh Akella. 114-119 [doi]
• Power estimation for mobile applications with profile-driven battery tracesChengke Wang, Fengrun Yan, Yao Guo, Xiangqun Chen. 120-125 [doi]
• Breaking the boundary for whole-system performance optimization of big dataYan Li, Kun Wang, Qi Guo, Xin Li, Xiaochen Zhang, Guancheng Chen, Tao Liu, Jian Li. 126-131 [doi]
• Low-power Networks-on-Chip: Progress and remaining challengesMark Buckler, Wayne Burleson, Greg Sadowski. 132-134 [doi]
• Beyond charge based computation: Design space exploration of spin transfer torque based MRAMs for embedded applicationsArijit Raychowdhury. 135-138 [doi]
• Beyond charge-based computation: Boolean and non-Boolean computing with spin torque devicesKaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra. 139-142 [doi]
• Semiconductor spintronics: Switching spins at low voltageG. Salis. 143 [doi]
• Carbon nanotube imperfection-immune digital VLSISubhasish Mitra. 144 [doi]
• Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applicationsHuichu Liu, Suman Datta, Vijaykrishnan Narayanan. 145-150 [doi]
• Graphene nano-ribbon field-effect transistors as future low-power devicesYing-Yu Chen, Amit Sangai, Morteza Gholipour, Deming Chen. 151-156 [doi]
• Tunnel FET-based ultra-low power, high-sensitivity UHF RFID rectifierHuichu Liu, Ramesh Vaddi, Suman Datta, Vijaykrishnan Narayanan. 157-162 [doi]
• An energy-efficient 5-MHz to 20-MHz, 12-bit reconfigurable continuous-time ΣΔ modulator for 4G-LTE applicationJing Li, Ruiyuan Zhu, Ting Yi, Bill Liu, Zhiliang Hong. 163-168 [doi]
• Switched-capacitor boost converter design and modeling for indoor optical energy harvesting with integrated photodiodesStanley W. Hsu, Erin G. Fong, Vipul Jain, Travis Kleeburg, Rajeevan Amirtharajah. 169-174 [doi]
• A practical low-power memristor-based analog neural branch predictorJianxing Wang, Yenni Tim, Weng-Fai Wong, Hai Helen Li. 175-180 [doi]
• Minimum supply voltage for sequential logic circuits in a 22nm technologyChia-Hsiang Chen, Keith A. Bowman, Charles Augustine, Zhengya Zhang, Jim Tschanz. 181-186 [doi]
• REEL: Reducing effective execution latency of floating point operationsVignyan Reddy, Syed Zohaib Gilani, Erika Gunadi, Nam Sung Kim, Michael J. Schulte, Mikko H. Lipasti. 187-192 [doi]
• Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessorAlan J. Drake, Michael S. Floyd, Richard L. Willaman, Derek J. Hathaway, Joshua Hernandez, Crystal Soja, Marshall D. Tiner, Gary D. Carpenter, Robert M. Senger. 193-198 [doi]
• A pipeline architecture with 1-cycle timing error correction for low voltage operationsInsup Shin, Jae-Joon Kim, Yu-Shiang Lin, Youngsoo Shin. 199-204 [doi]
• Coordinated refresh: Energy efficient techniques for DRAM refresh schedulingIshwar Bhati, Zeshan Chishti, Bruce Jacob. 205-210 [doi]
• An energy-efficient branch prediction technique via global-history noise reductionZichao Xie, Dong Tong, Xu Cheng. 211-216 [doi]
• WoM-SET: Low power proactive-SET-based PCM write using WoM codeXianWei Zhang, Le Jang, Youtao Zhang, Chuanjun Zhang, Jun Yang 0002. 217-222 [doi]
• Write intensity prediction for energy-efficient non-volatile cachesJunwhan Ahn, Sungjoo Yoo, Kiyoung Choi. 223-228 [doi]
• Variable-energy write STT-RAM architecture with bit-wise write-completion monitoringTianhao Zheng, Jaeyoung Park, Michael Orshansky, Mattan Erez. 229-234 [doi]
• Associative processing with coupled oscillatorsSteven P. Levitan, Yan Fang, John A. Carpenter, Chet N. Gnegy, Natalie S. Janosik, Soyo Awosika-Olumo, Donald M. Chiarulli, György Csaba, Wolfgang Porod. 235 [doi]
• TFET-based cellular neural network architecturesIndranil Palit, Xiaobo Sharon Hu, Joseph Nahas, Michael T. Niemier. 236-241 [doi]
• Memristor-based approximated computationBoxun Li, Yi Shan, Miao Hu, Yu Wang 0002, Yiran Chen, Huazhong Yang. 242-247 [doi]
• Challenges on designing electrostatic discharge protection solutions for low power electronicsJuin J. Liou. 248 [doi]
• Heterogeneous integration of nano enabling devices for 3D ICsLi Wang, Rui Ma, Chen Zhang, Zongyu Dong, Xin Wang, Zitao Shi, Jian Liu, Lin Lin, Hui Zhao, Fei Lu, Qiang Fang, Chen Yang, Jing Zhan, Tianling Ren, Xinxin Li, Ru Huang, Albert Z. Wang. 249-254 [doi]
• Impact of back gate biasing schemes on energy and robustness of ULV logic in 28nm UTBB FDSOI technologyGuerric de Streel, David Bol. 255-260 [doi]
• Low-voltage low-overhead asynchronous logicAkshay Sridharan, Carl Sechen, Roozbeh Jafari. 261-266 [doi]
• Robust and energy-efficient asynchronous dynamic pipelines for ultra-low-voltage operation using adaptive keeper controlYu Chen, Mingoo Seok, Steven M. Nowick. 267-272 [doi]
• SimICT: A fast and flexible framework for performance and power evaluation of large-scale architectureXiaochun Ye, Dongrui Fan, Ninghui Sun, Shibin Tang, Mingzhe Zhang, Hao Zhang. 273-278 [doi]
• Energy-efficient computing using adaptive table lookup based on nonvolatile memoriesJason Cong, Milos D. Ercegovac, Muhuan Huang, Sen Li, Bingjun Xiao. 280-285 [doi]
• Active SSD design for energy-efficiency improvement of web-scale data analysisJian Ouyang, Shiding Lin, Zhenyu Hou, Peng Wang, Yong Wang, Guangyu Sun. 286-291 [doi]
• Digital bimodal function: An ultra-low energy security primitiveTeng Xu, James Bradley Wendt, Miodrag Potkonjak. 292-296 [doi]
• Page policy control with memory partitioning for DRAM performance and power efficiencyMingli Xie, Dong Tong, Yi Feng, Kan Huang, Xu Cheng. 298-303 [doi]
• Exploring synergistic DVFS control of cores and DRAMs for thermal efficiency in CMPs with 3D-stacked DRAMsPing-Sheng Lin, Yi-Jung Chen, Chia-Lin Yang, Yi-Chang Lu. 304 [doi]
• Composable accelerator-rich microprocessor enhanced for adaptivity and longevityJason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Hui Huang 0001, Glenn Reinman. 305-310 [doi]
• Platform-dependent, leakage-aware control of the driving current of embedded thermoelectric coolersMohammad Javad Dousti, Massoud Pedram. 311-316 [doi]
• Understanding the critical path in power state transition latenciesSam Likun Xi, Marisabel Guevara, Jared Nelson, Patrick Pensabene, Benjamin C. Lee. 317-322 [doi]
• Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodologyWenfeng Zhao, Yajun Ha, Chin Hau Hoo, Anastacia B. Alvarez. 323-328 [doi]
• An ultralow-power memory-based big-data computing platform by nonvolatile domain-wall nanowire devicesYuhao Wang, Hao Yu. 329-334 [doi]
• Energy-efficient pass-transistor-logic using decision feedback equalizationZafar Takhirov, Bobak Nazer, Ajay Joshi. 335-340 [doi]
• PreTrans: Reducing TLB CAM-search via page number prediction and speculative pre-translationJiachen Xue, Mithuna Thottethodi. 341-346 [doi]
• A hybrid display frame buffer architecture for energy efficient display subsystemsKyungtae Han, Alexander W. Min, Nithyananda S. Jeganathan, Paul Diefenbaugh. 347-353 [doi]
• An analytical solution for multi-core energy calculation with consideration of leakage and temperature dependencyMing Fan, Vivek Chaturvedi, Shi Sha, Gang Quan. 353-358 [doi]
• A biomass-based marine sediment energy harvesting systemGuoxian Huang, Ridvan Umaz, Udayarka Karra, Baikun Li, Lei Wang. 359-364 [doi]
• An automated framework for generating variable-accuracy battery models from datasheet informationMassimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino. 365-370 [doi]
• A novel envelope edge detector for ultra-low power sensor wake-up circuitYao Wang, Haibo Wang, Guangjun Wen. 371-376 [doi]
• ESPN: A case for energy-star photonic on-chip networkZhongqi Li, Tao Li. 377-382 [doi]
• Rethinking DC-DC converter design constraints for adaptable systems that target the minimum-energy pointMatthew J. Turnquist, Jani Mäkipää, Markus Hiienkari, Hanh-Phuc Le, Lauri Koskinen. 383-388 [doi]
• Energy characterization and instruction-level energy model of Intel's Xeon Phi processorYakun Sophia Shao, David Brooks. 389-394 [doi]
• Quantifying acceleration: Power/performance trade-offs of application kernels in hardwareBrandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David Brooks. 395-400 [doi]
• Understanding query complexity and its implications for energy-efficient web searchEmily Bragg, Marisabel Guevara, Benjamin C. Lee. 401 [doi]
• Litho-aware and low power design of a secure current-based physically unclonable functionRaghavan Kumar, Wayne Burleson. 402-407 [doi]
• A low power ECG acquisition system implemented with a fully integrated analog front-endYayu Cheng, Jun Wang, Meiying Wen, Ye Li. 408 [doi]
• Hardware acceleration for similarity measurement in natural language processingPrateek Tandon, Vahed Qazvinian, Jichuan Chang, Parthasarathy Ranganathan, Ronald G. Dreslinski, Thomas F. Wenisch. 409-414 [doi]
• vCap: Adaptive power capping for virtualized serversCan Hankendi, Sherief Reda, Ayse Kivilcim Coskun. 415-420 [doi]
• Power reduction by aggressive synthesis design space explorationMatthew M. Ziegler, George Gristede, Victor V. Zyuban. 421-426 [doi]