Ilija Hadzic - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 20 from 20

2023

SACPlanner: Real-World Collision Avoidance with a Soft Actor Critic Local Planner and Polar State RepresentationsKhaled Nakhleh, Minahil Raza, Mack Tang, Matthew Andrews, Rinu Boney, Ilija Hadzic, Jeongran Lee, Atefeh Mohajeri, Karina Palyutina. icra 2023: 9464-9470 [doi]

2021

Safe Predictive Control of Four-Wheel Mobile Robot with Independent Steering and DriveAliasghar Arab, Ilija Hadzic, Jingang Yi. amcc 2021: 2962-2967 [doi]

2019

Server Placement and Selection for Edge Computing in the ePCIlija Hadzic, Yoshihisa Abe, Hans Christian Woithe. tsc, 12(5):671-684, 2019. [doi]

2017

Edge computing in the ePC: a reality checkIlija Hadzic, Yoshihisa Abe, Hans C. Woithe. edge 2017: [doi]

2016

Building Media-Rich Cloud Services from Network-Attached I/O DevicesIlija Hadzic, Martin D. Carroll, Michael J. Coss, Hans C. Woithe. ficloud 2016: 41-49 [doi]

Low-Level Frame-Buffer Scraping for GPUs in the CloudIlija Hadzic, Martin D. Carroll, Hans C. Woithe. ism 2016: 529-532 [doi]

2013

A Simple Desktop Compression and Streaming SystemIlija Hadzic, Hans C. Woithe, Martin D. Carroll. ism 2013: 339-346 [doi]

2012

3D Rendering in the CloudMartin D. Carroll, Ilija Hadzic, William A. Katsak. bell, 17(2):55-66, 2012. [doi]

2011

A Synchronization Algorithm for Packet MANsIlija Hadzic, Dennis R. Morgan, Zulfiquar Sayeed. tcom, 59(4):1142-1153, 2011. [doi]

2010

Improving IEEE 1588v2 clock performance through controlled packet departuresBrent Mochizuki, Ilija Hadzic. icl, 14(5):459-461, 2010. [doi]

A simple analysis of linear regression with sample-minimum Erlang variatesDennis R. Morgan, Ilija Hadzic. icassp 2010: 3798-3801 [doi]

Nonuniform linear regression with block-wise sample-minimum preprocessingDennis R. Morgan, Ilija Hadzic. tsp, 58(8):4040-4049, 2010. [doi]

2006

Synthesis of high-performance packet processing pipelinesCristian Soviani, Ilija Hadzic, Stephen A. Edwards. dac 2006: 679-682 [doi]

2005

High-performance synchronization for circuit emulation in an Ethernet MANIlija Hadzic, Edward S. Szurkowski. jcn, 7(1):1-12, 2005. [doi]

An FPGA Application with High Speed Serial Transceiver Running at Sub-nominal RateDusan Suvakovic, Ilija Hadzic. fpl 2005: 229-234

2003

Balancing performance and flexibility with hardware support for network architecturesIlija Hadzic, Jonathan M. Smith. tocs, 21(4):375-411, 2003. [doi]

2001

Hierarchical MAC address space in public Ethernet networksIlija Hadzic. globecom 2001: 1563-1569 [doi]

1999

FPGA VirusesIlija Hadzic, Sanjay Udani, Jonathan M. Smith. fpl 1999: 291-300

1998

Protocol boosters: applying programmability to network infrastructuresWilliam S. Marcus, Ilija Hadzic, Anthony J. McAuley, Jonathan M. Smith. cm, 36(10):79-83, 1998. [doi]

1997

P4: A platform for FPGA implementation of protocol boostersIlija Hadzic, Jonathan M. Smith. fpl 1997: 438-447

Sign in or sign up to see more results.

runs on WebDSL