J. Robert Heath - researchr alias

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Viewing Publication 1 - 22 from 22

2011

FPGA based parallel architecture implementation of Stacked Error Diffusion algorithmRishvanth Kora Venugopal, J. Robert Heath, Daniel L. Lau. sasp 2011: 66-69 [doi]

2010

A new multichannel, coherent amplitude modulated, time-division multiplexed, software-defined radio receiver architecture, and field-programmable-gate-array technology implementationVeerendra Bhargav Alluri, J. Robert Heath, Michael Lhamon. tsp, 58(10):5369-5384, 2010. [doi]

2009

Development and Validation of a Load Balancing and Control Mechanism for a Reconfigurable Single-Chip Heterogenous and Hybrid Multiprocessor Architecture PlatformJ. Robert Heath, Sridhar Hegde, Kanchan Bhide. ISCApdcs 2009: 228-235

A New Reconfigurable Network Node Processor Architecture for Distributed Implementation of Ephemeral State ProcessingJ. Robert Heath, Nien Y. Lim, Kenneth L. Calvert, Jim Griffioen. ISCApdcs 2009: 213-220

2008

A Hand-Held Programmable-Logic-Device Based Temperature and Relative-Humidity Sensor, Processor and Display System Platform for Automation and Control of Industry ProcessesPhani Tangirala, J. Robert Heath, Arthur Radun, Terry Conners. iasam 2008: 1-8 [doi]

2007

New systolic array processor architecture for simultaneous discrete convolution of an image plane with multiple filter coefficient setsAlbert T. Wong, J. Robert Heath, Michael Lhamon. jei, 16(1):13014, 2007. [doi]

2004

ESP: a flexible, high-performance, PLD-based network serviceM. Muthulakshmi, J. Robert Heath, Kenneth L. Calvert, James Griffioen. icc 2004: 1014-1018 [doi]

2001

Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor ArchitectureJ. Robert Heath, Andrew Tan. rsp 2001: 128-135 [doi]

2000

High speed storage area networks using a fibre channel arbitrated loop interconnectJ. Robert Heath, Peter Yakutis. network, 14(2):51-56, 2000. [doi]

1997

Development, Analysis, and Verification of a Parallel Hybrid Dataflow Computer Architectural Framework and Associated Load-Balancing Strategies and Algorithms via Parallel SimulationJ. Robert Heath, Balasubramanian Sivanesa. simulation, 69(1):7-25, 1997. [doi]

1994

PARALLEX: a parallel approach to switchbox routingTae Won Cho, Sam S. Pyo, J. Robert Heath. tcad, 13(6):684-693, 1994. [doi]

1992

A new conflict resolving switchbox routerTae Won Cho, Sam S. Pyo, J. Robert Heath. glvlsi 1992: 95-102 [doi]

1988

A methodology for the control and custom VLSI implementation of large-scale Clos networksJ. Robert Heath, Eric Allen Disch. iccd 1988: 472-477 [doi]

1986

A note on "Realization of digital filters using input-scaled floating-point arithmetic"J. Robert Heath. tsp, 34(4):995, 1986. [doi]

1984

An Integrated-Circuit Crossbar Switching System DesignGeorge Broomell, J. Robert Heath. icdcs 1984: 278-287

1983

Classification Categories and Historical Development of Circuit Switching TopologiesGeorge Broomell, J. Robert Heath. ACM Comput. Surv., 15(2):95-133, 1983.

1982

A distributed computer architecture for real-time, data driven applicationsJ. Robert Heath, George Broomell, Andrew D. Hurt. icdcs 1982: 630-638

The Design of a Fault-Tolerant Computing Element for Distributed Data ProcessorsAndrew D. Hurt, J. Robert Heath. icdcs 1982: 171-176

A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor ArchitectureAndrew D. Hurt, J. Robert Heath. rtss 1982: 113-123

1981

How to Write a Universal Cross-AssemblerJ. Robert Heath, Shailesh Patel. micro, 1(3):45-66, 1981. [doi]

1980

The Complexity and Use of a Multistage Interconnection Network for Distributed Processing SystemsJ. Robert Heath, James Cline. rtss 1980: 28-35

1977

CDL - A tool for concurrent hardware and software developmentJ. Robert Heath, B. D. Carroll, Terry T. Cwik. dac 1977: 445-449 [doi]

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