John F. Brown III - researchr alias

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Viewing Publication 1 - 7 from 7

2008

2007

On-Chip Interconnection Architecture of the Tile ProcessorDavid Wentzlaff, Patrick Griffin, Henry Hoffmann, Liewei Bao, Bruce Edwards, Carl Ramey, Matthew Mattina, Chyi-Chang Miao, John F. Brown III, Anant Agarwal. micro, 27(5):15-31, 2007. [doi]

1992

NVAX and NVAX + Single-Chip CMOS VAX MicroprocessorsDebra Bernstein, John F. Brown III, Rebecca L. Stamm, G. Michael Uhler. iccd 1992: 302-305

The NVAX and NVAX+ High-Performance VAX MicroprocessorG. Michael Uhler, Debra Bernstein, Larry L. Biro, John F. Brown III, John H. Edmondson, Jeffrey D. Pickholtz, Rebecca L. Stamm. dtj, 4(3), 1992. [doi]

1984

A chip set microarchitecture for a high-performance VAX implementationJohn F. Brown III, Richard L. Sites. micro 1984: 48-54 [doi]

Design verification of a VLSI VAX microcomputerSridhar Samudrala, Charles Lo, John F. Brown III, Richard E. Calcagni. micro 1984: 59-63 [doi]

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