Lori E. Lucke - researchr alias

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Viewing Publication 1 - 10 from 10

2000

VLSI architectures for weighted order statistic (WOS) filtersChaitali Chakrabarti, Lori E. Lucke. sigpro, 80(8):1419-1433, 2000. [doi]

1998

ILP-based cost-optimal DSP synthesis with module selection and data format conversionK. Ito, Lori E. Lucke, Keshab K. Parhi. tvlsi, 6(4):582-594, 1998. [doi]

1996

a Similarity analysis of cardiac signals using temporal featuresByron de Jesus, Lori E. Lucke. icassp 1996: 3498-3501 [doi]

1994

Input compression and efficient VLSI architectures for rank order and stack filtersGeorge B. Adams III, Edward J. Coyle, Liangchien Lin, Lori E. Lucke, Keshab K. Parhi. sigpro, 38(3):441-453, 1994. [doi]

Module selection and data format conversion for cost-optimal DSP synthesisKazuhito Ito, Lori E. Lucke, Keshab K. Parhi. iccad 1994: 322-329 [doi]

Parallel processing architectures for rank order and stack filtersLori E. Lucke, Keshab K. Parhi. tsp, 42(5):1178-1189, 1994. [doi]

1993

Block processing for rank order filtering using the rank order state machine architectureLori E. Lucke, Keshab K. Parhi. icassp 1993: 357-360 [doi]

Parallel processing architectures for rank order and stack filtersLori E. Lucke, Keshab K. Parhi. asap 1993: 65-76 [doi]

Data-flow transformations for critical path time reduction in high-level DSP synthesisLori E. Lucke, Keshab K. Parhi. tcad, 12(7):1063-1068, 1993. [doi]

1992

Parallel structures for rank order and stack filtersLori E. Lucke, Keshab K. Parhi. icassp 1992: 645-648 [doi]

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