Ram Huggahalli - researchr alias

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Viewing Publication 1 - 15 from 15

2020

Fabsim-X: A Simulation Framework for the Analysis of Large-Scale Topologies and Congestion Control Protocols in Data Center NetworksMalek Musleh, Roberto Peñaranda, Allister Alemania, Pedro Yebenes Segura, Gene Wu, Jan Zielinski, Krzysztof Raszkowski, Nan Ni, Scott Diesing, Anupama Kurpad, Ram Huggahalli, Curt E. Bruns, Steven Miller, Sujoy Senxiv. mascots 2020: 1-8 [doi]

2019

Evaluating Quality of Service Traffic Classes on the Megafly NetworkMisbah Mubarak, Neil McGlohon, Malek Musleh, Eric Borch, Robert B. Ross, Ram Huggahalli, Sudheer Chunduri, Scott Parker, Christopher D. Carothers, Kalyan Kumaran. supercomputer 2019: 3-20 [doi]

2016

Enabling Scalable High-Performance Systems with the Intel Omni-Path ArchitectureMark S. Birrittella, Mark Debbage, Ram Huggahalli, James Kunz, Tom Lovett, Todd Rimmer, Keith D. Underwood, Robert C. Zak. micro, 36(4):38-47, 2016. [doi]

2015

Intel® Omni-path Architecture: Enabling Scalable, High Performance FabricsMark S. Birrittella, Mark Debbage, Ram Huggahalli, James Kunz, Tom Lovett, Todd Rimmer, Keith D. Underwood, Robert C. Zak. hoti 2015: 1-9 [doi]

2010

Understanding Power Efficiency of TCP/IP Packet Processing over 10GbEGuangdeng Liao, Xia Zhu, Steen Larsen, Laxmi N. Bhuyan, Ram Huggahalli. hoti 2010: 32-39 [doi]

2009

Characterization of Direct Cache Access on multi-core systems and 10GbEAmit Kumar, Ram Huggahalli, Srihari Makineni. hpca 2009: 341-352 [doi]

Architectural Breakdown of End-to-End Latency in a TCP/IP NetworkSteen Larsen, Parthasarathy Sarangam, Ram Huggahalli, Siddharth Kulkarni. ijpp, 37(6):556-571, 2009. [doi]

2008

Achieving 10Gbps Network Processing: Are We There Yet?Priya Govindarajan, Srihari Makineni, Donald Newell, Ravi R. Iyer, Ram Huggahalli, Amit Kumar. hipc 2008: 518-528 [doi]

2007

Impact of Cache Coherence Protocols on the Processing of Network TrafficAmit Kumar, Ram Huggahalli. micro 2007: 161-171 [doi]

Architectural Breakdown of End-to-End Latency in a TCP/IP NetworkSteen Larsen, Parthasarathy Sarangam, Ram Huggahalli. sbac-pad 2007: 195-202 [doi]

2005

Direct Cache Access for High Bandwidth Network I/ORam Huggahalli, Ravi R. Iyer, Scott Tetrick. isca 2005: 50-59 [doi]

2004

1991

A neural network architecture for faster dynamic scheduling in manufacturing systemsCihan Dagli, Ram Huggahalli. icra 1990: 2408-2413 [doi]

An architecture level simulation methodologyPaul D. Stigall, Ram Huggahalli. anss 1991: 240-253 [doi]

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