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Andrew J. Black

Bradley J. Benschneider

Dale R. Donchin

Daniel E. Dever

Daniel W. Dobberpuhl

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Sharon M. Britton

Sribalan Santhanam

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Publications by 'Sribalan Santhanam'

Publications

Viewing Publication 1 - 7 from 7

2007

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O SubsystemsZongjian Chen, Priya Ananthanarayanan, Sukalp Biswas, Brian Campbell, Hao Chen, Shaishav Desai, Dominic Go, Rajat Goel, Vincent von Kaenel, Jason Kassoff, Fabian Klass, Weichun Ku, Tony Li, Jonathon Lin, Khurram Malik, Anup Mehta, Daniel Murray, Eric Shiu, Chris Shuler, Sribalan Santhanam, Greg Scott, Junji Sugisawa, Toshinari Takayanagi, Honkai John Tarn, Pradeep Trivedi, James Wang, Ricky Wen, John Yong. isscc 2007: 104-105 [doi]

TM Microprocessor CoreDaniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare. cicc 2007: 725-728 [doi]

1998

A low-cost, 300-MHz, RISC CPU with attached media processorSribalan Santhanam, Allen J. Baum, David Bertucci, Mike Braganza, Kevin Broch, Todd Broch, James Burnette, Edward Chang, Kwong-Tak Chui, Dan Dobberpuhl, Paul M. Donahue, Joel Grodstein, Insung Kim, Daniel Murray, Mark H. Pearce, Amy Silveria, Dave Souydalay, Aaron Spink, Robert Stepanian, Anand Varadharajan, Vincent R. von Kaenel, Ricky Wen. jssc, 33(11):1829-1839, 1998. [doi]

1997

A 160-MHz, 32-b, 0.5-W CMOS RISC MicroprocessorJames Montanaro, Richard T. Witek, Krishna Anne, Andrew J. Black, Elizabeth M. Cooper, Daniel W. Dobberpuhl, Paul M. Donahue, Jim Eno, Gregory W. Hoeppner, David Kruckemyer, Thomas H. Lee, Peter C. M. Lin, Liam Madden, Daniel Murray, Mark H. Pearce, Sribalan Santhanam, Kathryn J. Snyder, Ray Stephany, Stephen C. Thierauf. dtj, 9(1), 1997. [doi]

1995

A 300-MHz 64-b quad-issue CMOS RISC microprocessorBradley J. Benschneider, Andrew J. Black, William J. Bowhill, Sharon M. Britton, Daniel E. Dever, Dale R. Donchin, Robert J. Dupcak, Richard M. Fromm, Mary K. Gowan, Paul E. Gronowski, Michael Kantrowitz, Marc E. Lamere, Shekhar Mehta, Jeanne E. Meyer, Robert O. Mueller, Andy Olesin, Ronald P. Preston, Donald A. Priore, Sribalan Santhanam, Michael J. Smith 0007, Gilbert M. Wolrich. jssc, 30(11):1203-1214, November 1995. [doi]

Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPUWilliam J. Bowhill, Shane L. Bell, Bradley J. Benschneider, Andrew J. Black, Sharon M. Britton, Ruben W. Castelino, Dale R. Donchin, John H. Edmondson, Harry R. Fair III, Paul E. Gronowski, Anil K. Jain 0003, Patricia L. Kroesen, Marc E. Lamere, Bruce J. Loughlin, Shekhar Mehta, Robert O. Mueller, Ronald P. Preston, Sribalan Santhanam, Timothy A. Shedd, Michael J. Smith, Stephen C. Thierauf. dtj, 7(1), 1995.

1992

A 200-MHz 64-bit Dual-Issue CMOS MicroprocessorDaniel W. Dobberpuhl, Richard T. Witek, Randy L. Allmon, Robert Anglin, David Bertucci, Sharon M. Britton, Linda Chao, Robert A. Conrad, Daniel E. Dever, Bruce Gieseke, Soha Hassoun, Gregory W. Hoeppner, Kathryn Kuchler, Maureen Ladd, Burton M. Leary, Liam Madden, Edward J. McLellan, Derrick Meyer, James Montanaro, Donald Priore, Vidya Rajagopalan, Sridhar Samudrala, Sribalan Santhanam. dtj, 4(4), 1992. [doi]

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