Takao Uehara - researchr alias

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Viewing Publication 1 - 12 from 12

2000

Partnership bidding for computer bridgeTakahisa Ando, Yoshiyuki Sekiya, Takao Uehara. scjapan, 31(2):72-82, 2000. [doi]

Reasoning by Agents in Computer Bridge BiddingTakahisa Ando, Takao Uehara. CG 2002: 346-364 [doi]

1995

Application of abduction to computer bridgeTakao Uehara. scjapan, 26(9):23-33, 1995. [doi]

1986

Computer Aided Design and Artificial Intelligence (Panel)Takao Uehara. ifip 1986: 927-928

1985

A Knowledge-Based Logic Design SystemTakao Uehara. dt, 2(5):27-34, 1985. [doi]

1983

Logic Circuit Synthesis Using PrologTakao Uehara, Nobuaki Kawato. ngc, 1(2):187-193, 1983.

1982

An interactive logic synthesis system based upon AI techniquesNobuaki Kawato, Takao Uehara, Sadaki Hirose, Takao Saito. dac 1982: 858-864 [doi]

A verification technique for hardware designsFumihiro Maruyama, Takao Uehara, Nobuaki Kawato, Takao Saito. dac 1982: 832-841 [doi]

1981

A CAD system for logic design based on frames and demonsTakao Saito, Takao Uehara, Nobuaki Kawato. dac 1981: 451-456 [doi]

Optimal Layout of CMOS Functional ArraysTakao Uehara, William M. van Cleemput. TC, 30(5):305-312, 1981.

1979

Design and verification of large-scale computers by using DDLNobuaki Kawato, Takao Saito, Fumihiro Maruyama, Takao Uehara. dac 1979: 360-366 [doi]

Optimal layout of CMOS functional arraysTakao Uehara, William M. van Cleemput. dac 1979: 287-289 [doi]

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