8 | -- | 0 | Victor J. Duvanenko. Two Writes Make a Read |
12 | -- | 14 | David Sims. Vendors Struggle with Costs, Benefits of Shrinking Cycle Times |
28 | -- | 35 | N. Asokan, Philippe A. Janson, Michael Steiner, Michael Waidner. The State of the Art in Electronic Payment Systems |
40 | -- | 42 | Joseph A. Fisher. Walk-Time Techniques: Catalyst for Architectural Change |
43 | -- | 45 | Keith Diefendorff, Pradeep K. Dubey. How Multimedia Workloads Will Change Processor Design |
46 | -- | 49 | Doug Burger, James R. Goodman. Billion-Transistor Architectures - Guest Editors Introduction |
51 | -- | 57 | Yale N. Patt, Sanjay J. Patel, Marius Evers, Daniel H. Friendly, Jared Stark. One Billion Transistors, One Uniprocessor, One Chip |
59 | -- | 66 | Mikko H. Lipasti, John Paul Shen. Superspeculative Microarchitecture for Beyond AD 2000 |
68 | -- | 74 | James E. Smith, Sriram Vajapeyam. Trace Processors: Moving to Fourth-Generation Microarchitectures |
75 | -- | 78 | Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick. Scalable Processors in the Billion-Transistor Era: IRAM |
79 | -- | 85 | Lance Hammond, Basem A. Nayfeh, Kunle Olukotun. A Single-Chip Multiprocessor |
86 | -- | 93 | Elliot Waingold, Michael Bedford Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal. Baring It All to Software: Raw Machines |
123 | -- | 124 | Jerry Foley, Charles Severance. OSI Retrospect and Prospect |
128 | -- | 129 | Vijay Gurbaxani, Janet Wilson. Bridging IT and Business: Techno MBAs |
130 | -- | 131 | Carlo Pescio. Principles Versus Patterns |
134 | -- | 136 | Ted G. Lewis. Digitopolis Meets Encalming Technology |