Journal: IEEE Design & Test of Computers

Volume 21, Issue 2

77 -- 78Rajesh Gupta. From the EIC: Past successes, future challenges
79 -- 0Roy L. Russo. Serving a growing community: How D&T began
80 -- 82Magdy S. Abadir, Li-C. Wang. Guest Editors Introduction: The Verification and Test of Complex Digital ICs
84 -- 93Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv. Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification
94 -- 101Carl Scafidi, J. Douglas Gibson, Rohit Bhatia. Validating the Itanium 2 Exception Control Unit: A Unit-Level Approach
102 -- 109Fulvio Corno, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero. Automatic Test Program Generation: A Case Study
111 -- 120Chia-Chih Yen, Jing-Yang Jou, Kuang-Chien Chen. A Divide-and-Conquer-Based Algorithm for Automatic Simulation Vector Generation
122 -- 131Prabhat Mishra, Nikil Dutt, Narayanan Krishnamurthy, Magdy S. Abadir. A Top-Down Methodology for Microprocessor Validation
132 -- 143Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang. Safety Property Verification Using Sequential SAT and Bounded Model Checking
144 -- 156Rob Aitken, Stefan Eichenberger, Gary Maier, Sandip Kundu, Hank Walker. ITC 2003 Roundtable: Design for Manufacturability
157 -- 158Peter J. Ashenden. Policies and procedures - who needs them?
159 -- 0William Mann. Southwest Test Workshop 2004
160 -- 163Carol Stolicny, Tapio Koivukangas, Rubin A. Parekhji, Ian G. Harris, Rob Aitken. ITC 2003 panels: Part 1
164 -- 165Paolo Prinetto, Alfredo Benso. Test Technology TC Newsletter
166 -- 0John Willis, Andreas Kuehlmann. Design Automation TC Newsletter
168 -- 0Prab Varma. Verification evolution or industrial revolution?