915 | -- | 916 | Takao Waho. Special Section on Fundamentals and Applications of Advanced Semiconductor Devices |
917 | -- | 922 | Tetsuya Suemitsu, Masami Tokumitsu. InP HEMT Technology for High-Speed Logic and Communications |
923 | -- | 928 | Kouji Ishikura, Isao Takenaka, Hidemasa Takahashi, Kouichi Hasegawa, Kazunori Asano, Naotaka Iwata. High Power GaAs Heterojunction FET with Dual Field-Modulating-Plates for 28 V Operated W-CDMA Base Station |
929 | -- | 936 | Akio Wakejima, Kohji Matsunaga, Yuji Ando, Tatsuo Nakayama, Yasuhiro Okamoto, Kazuki Ota, Naotaka Kuroda, Masahiro Tanomura, Hironobu Miyamoto. High Power GaN-FET Amplifier with Reduced Memory Effects for W-CDMA Base Stations |
937 | -- | 942 | Chien-Nan Liao, Feng-Tso Chien, Chi-Ling Wang, Hsien-Chin Chiu, Yi-Jen Chan. A Novel Power MOSFET Structure with Shallow Junction Dual Well Design |
943 | -- | 948 | Wancheng Zhang, Katsuhiko Nishiguchi, Yukinori Ono, Akira Fujiwara, Hiroshi Yamaguchi, Hiroshi Inokawa, Yasuo Takahashi, Nan-Jian Wu. Transfer and Detection of Single Electrons Using Metal-Oxide-Semiconductor Field-Effect Transistors |
949 | -- | 954 | Mitsuhiro Hanabe, Yahya Moubarak Meziani, Taiichi Otsuji, Eiichi Sano, Tanemasa Asano. Possibility of Terahertz Injection-Locked Oscillation in an InGaP/InGaAs/GaAs Two-Dimensional Plasmon-Resonant Photomixer |
955 | -- | 961 | Tetsuo Endoh, Kazuyuki Hirose, Kenji Shiraishi. Physical Origin of Stress-Induced Leakage Currents in Ultra-Thin Silicon Dioxide Films |
962 | -- | 967 | Yanli Pei, Hideki Murakami, Seiichiro Higashi, Seiichi Miyazaki, Seiji Inumiya, Yasuo Nara. Evaluation of Dielectric Reliability of Ultrathin HfSiO::x::N::y:: in Metal-Gate Capacitors |
968 | -- | 972 | Hochul Lee, Youngchang Yoon, Seongjae Cho, Hyungcheol Shin. Accurate Extraction of the Trap Depth from RTS Noise Data by Including Poly Depletion Effect and Surface Potential Variation in MOSFETs |
973 | -- | 977 | Kentaro Shibahara, Nobuhide Maeda. Gate-Extension Overlap Control by Sb Tilt Implantation |
978 | -- | 982 | Jong-Pil Kim, Woo-Young Choi, Jae Young Song, Seongjae Cho, Sang Wan Kim, Jong Duk Lee, Byung-Gook Park. Design and Simulation of Asymmetric MOSFETs |
983 | -- | 987 | Yukisato Nogami, Toshifumi Satoh, Hiroyuki Tango. Two-Dimensional Simulation of Electric Field and Carrier Concentration of Low-Temperature N-Channel Poly-Si LDD TFTs |
988 | -- | 993 | Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hoon Lee, Jong-Pil Kim, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park. Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices |
994 | -- | 999 | Shun ichiro Ohmi, Tetsushi Sakai. A Proposal of TC-MOSFET and Fabrication Process of Twin Si Channels |
1000 | -- | 1005 | Tetsuo Endoh, Yuto Momma. Study of 30-nm Double-Gate MOSFET with Halo Implantation Technology Using a Two-Dimensional Device Simulator |
1006 | -- | 1011 | Hisakazu Miyatake, Takashi Ito. Improvement of ArF Photo Resist Pattern by VUV Cure |
1012 | -- | 1020 | Makoto Sugihara, Kenta Nakamura, Yusuke Matsunaga, Kazuaki Murakami. Technology Mapping Technique for Increasing Throughput of Character Projection Lithography |
1021 | -- | 1026 | Il-Hun Jeong, Oh-Kyong Kwon. 10-Bit Current Driver LSI for Large-Size and High-Resolution Active Matrix Organic Light Emitting Diode Displays |
1027 | -- | 1034 | Michihito Ueda, Ichiro Yamashita, Kiyoyuki Morita, Kentaro Setsune. Stochastic Associative Processor Operated by Random Voltages |
1035 | -- | 1036 | Yoshiaki Nakano. Special Section on Recent Advances in Integrated Photonic Devices |
1037 | -- | 1045 | Yasuo Kokubun. High Index Contrast Optical Waveguides and Their Applications to Microring Filter Circuit and Wavelength Selective Switch |
1046 | -- | 1054 | Shojiro Kawakami, Yoshihiko Inoue. Novel Functions in Microscopy Realized by Patterned Photonic Crystals |
1055 | -- | 1060 | Katsumi Nakatsuhara, Toyokazu Sasaki, Hiroki Sato, Takakiyo Nakagami. Si-Waveguide with Ferro-Electric Liquid Crystal Cladding for Use in Optical Switching Devices |
1061 | -- | 1070 | Manabu Kagami, Tatsuya Yamashita, Masatoshi Yonemura, Takayuki Matsui. Light-Induced Self-Written Optical Waveguides |
1071 | -- | 1080 | Osamu Mikami, Yusuke Mimura, Hiroshi Hanajima, Masahiro Kanda. Optical Connection with Optical Pins and Self-Written Waveguides for Board-Level Optical Wirings |
1081 | -- | 1089 | Yoichi Fujii, Yukiko Otsuka, Akira Ikeda. Lithium Niobate as an Optical Waveguide and Its Application to Integrated Optics |
1090 | -- | 1095 | Satoshi Shinada, Tetsuya Kawanishi, Masayuki Izutsu. A Resonant Type LiNbO::3:: Optical Modulator Array with Micro-Strip Antennas |
1096 | -- | 1104 | Akira Enokihara, Hiroyoshi Yajima, Hiroshi Murata, Yasuyuki Okamura. Guided-Wave EO Intensity Modulator Using Coupled Microstrip Line Electrode of Higher-Order Harmonic Resonance Combined with Polarization-Reversed Structure |
1105 | -- | 1110 | Nong Chen, Jesse Darja, Shinichi Narata, Kenji Ikeda, Kazuhiro Nishide, Yoshiaki Nakano. Ridge Semiconductor Laser with Laterally Undercut Etched Current Confinement Structure |
1111 | -- | 1117 | Jesse Darja, Melvin J. Chan, Shu-Rong Wang, Masakazu Sugiyama, Yoshiaki Nakano. Four Channel Ridge DFB Laser Array for 1.55 µm CWDM Systems by Wide-Stripe Selective Area MOVPE |
1118 | -- | 1123 | Yasunori Miyazaki, Kazuhisa Takagi, Keisuke Matsumoto, Toshiharu Miyahara, Tatsuo Hatta, Satoshi Nishikawa, Toshitaka Aoyagi, Kuniaki Motoshima. Design and Fabrication of 40 Gbps-NRZ SOA-MZI All-Optical Wavelength Converters with Submicron-Width Bulk InGaAsP Active Waveguides |
1124 | -- | 1128 | Abdullah Al Amin, Kenji Sakurai, Tomonari Shioda, Masakazu Sugiyama, Yoshiaki Nakano. Fabrication of a Monolithically Integrated WDM Channel Selector Using Single Step Selective Area MOVPE and Its Characterization |
1129 | -- | 1137 | Yasue Yamamoto, Masanori Shirahama, Toshiaki Kawasaki, Ryuji Nishihara, Shinichi Sumi, Yasuhiro Agata, Hirohito Kikukawa, Hiroyuki Yamauchi. A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI |