| 8 | -- | 18 | Ahmad Khairi, Yoel Krupnik, Amir Laufer, Yoav Segal, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Idan Lotan, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky Grafi, Udi Virobnik, Dror Lazar, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Frank O'Mahony, Ariel Cohen 0001. A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels |
| 19 | -- | 29 | Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, YanDong He, Song Jia, Congcong Chen, Jiaqi Yu. A 2.29-pJ/b 112-Gb/s Wireline Transceiver With RX Four-Tap FFE for Medium-Reach Applications in 28-nm CMOS |
| 30 | -- | 44 | Arian Hashemi Talkhooncheh, Weiwei Zhang, Minwo Wang, David J. Thomson 0001, Martin Ebert, Ke Li 0008, Graham T. Reed, Azita Emami. A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators |
| 45 | -- | 56 | Kai Sheng, Haowei Niu, Boyang Zhang, Weixin Gai, Bingyi Ye, Hang Zhou, Congcong Chen. A 4.6-pJ/b 200-Gb/s Analog DP-QPSK Coherent Optical Receiver in 28-nm CMOS |
| 57 | -- | 67 | Yu Zhao, Onur Memioglu, Long Kong, Behzad Razavi. A 56-GHz Fractional-N PLL With 110-fs Jitter |
| 68 | -- | 77 | Chi-Hsiang Huang 0001, Arindam Mandal, Diego Peña-Colaiocco, Edevaldo Pereira Da Silva, Visvesh S. Sathe 0001. Regenerative Breaking: Optimal Energy Recycling for Energy Minimization in Duty-Cycled Domains |
| 78 | -- | 89 | Suneui Park, Seyeon Yoo, Yuhwan Shin, Jeonghyun Lee, Jaehyouk Choi. A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 |
| 90 | -- | 101 | Jae-Gon Lee, YounSik Choi, Hoyeon Jeon, Jong Jin Lee, Dongsuk Shin. Fully Automated Hardware-Driven Clock-Gating Architecture With Complete Clock Coverage for 4 nm Exynos Mobile SOC |
| 102 | -- | 110 | Brian T. Vanderpool, Phillip J. Restle, Eric Fluhr, Gregory S. Still, Francesco A. Campisano, Ian Charmichael, Eric Marz, Rahul Batra, Richard L. Willaman. Deterministic Frequency and Voltage Enhancements on the POWER10 Processor |
| 111 | -- | 123 | Sumeet Singh Nagi, Uneeb Rathore, Krutikesh Sahoo, Tim Ling, Subramanian S. Iyer, Dejan Markovic. A 16-nm 784-Core Digital Signal Processor Array, Assembled as a 2 × 2 Dielet With 10-μm Pitch Interdielet I/O for Runtime Multiprogram Reconfiguration |
| 124 | -- | 140 | Yihong Zhu, Wenping Zhu, Chongyang Li, Min Zhu 0001, Chenchen Deng, Chen Chen, Shuying Yin, Shouyi Yin, Shaojun Wei, Leibo Liu. RePQC: A 3.4-uJ/Op 48-kOPS Post-Quantum Crypto-Processor for Multiple-Mathematical Problems |
| 141 | -- | 154 | Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan. A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures |
| 155 | -- | 166 | Ji-Soo Chang, Eunsang Jang, Youngkil Choi, Moonkyu Song, Sanghyo Lee, Gi-Jin Kang, Junho Kim, Uijong Song, Chang-Yeon Cho, Giyeong Ko, Hyunseok Hwang, Junseo Lee, Han-Sol Lee, Yong-Il Kwon, Kyungduck Seo, Taeseon Kim, Hyun-Wook Lim, Seongwook Song, Jae-Youl Lee, Sung-Ung Kwak. A 1.05-A/m Minimum Magnetic Field Strength Single-Chip, Fully Integrated Biometric Smart Card SoC Achieving 792.5-ms Transaction Time With Anti-Spoofing Fingerprint Authentication |
| 167 | -- | 176 | Yi-Yen Hsieh, Yu-Cheng Lin, Chia-Hsiang Yang. A 96.2-nJ/class Neural Signal Processor With Adaptable Intelligence for Seizure Prediction |
| 177 | -- | 188 | Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo. DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC |
| 189 | -- | 202 | Jun-Seok Park, Changsoo Park, Suknam Kwon, Taeho Jeon, Yesung Kang, Heonsoo Lee, Dongwoo Lee, James Kim, Hyeong-Seok Kim, YoungJong Lee, Sangkyu Park, Minseong Kim, Sanghyuck Ha, Jihoon Bang, Jinpyo Park, SukHwan Lim, Inyup Kang. A Multi-Mode 8k-MAC HW-Utilization-Aware Neural Processing Unit With a Unified Multi-Precision Datapath in 4-nm Flagship Mobile SoC |
| 203 | -- | 215 | Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst. DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge |
| 216 | -- | 226 | Yuhao Ju, Jie Gu 0001. A Systolic Neural CPU Processor Combining Deep Learning and General-Purpose Computing With Enhanced Data Locality and End-to-End Performance |
| 227 | -- | 242 | Yang Wang 0089, Yubin Qin, Dazheng Deng, Jingchuan Wei, Yang Zhou, Yuanqi Fan, Tianbao Chen, Hao Sun, Leibo Liu, Shaojun Wei, Shouyi Yin. An Energy-Efficient Transformer Processor Exploiting Dynamic Weak Relevances in Global Attention |
| 243 | -- | 255 | Fengbin Tu, Yiqi Wang 0005, Zihan Wu 0006, Ling Liang, Yufei Ding, Bongjin Kim, Leibo Liu, Shaojun Wei, Yuan Xie 0001, Shouyi Yin. ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration |
| 256 | -- | 269 | Myeong-Jae Park, Jinhyung Lee, Kyungjun Cho, Ji-Hwan Park, Junil Moon, Sung-Hak Lee, Tae-Kyun Kim, Sanghoon Oh, Seokwoo Choi, Yongsuk Choi, Ho Sung Cho, Tae Sik Yun, Young Jun Koo, Jae-Seung Lee, Byung Kuk Yoon, Young-Jun Park, Sangmuk Oh, Chang Kwon Lee, Seong-Hee Lee, Hyun Woo Kim, Yucheon Ju, Seung-Kyun Lim, Kyo Yun Lee, Sang-Hoon Lee, Woo Sung We, Seungchan Kim, Seung-Min Yang, Keonho Lee, In-Keun Kim, Younghyun Jeon, Jae Hyung Park, Jong-Chan Yun, Seonyeol Kim, Dong Yeol Lee, Su-Hyun Oh, Junghyun Shin, Yeonho Lee 0002, Jieun Jang, Joohwan Cho. A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization |
| 270 | -- | 278 | Yeonwook Jung, Seongseop Lee, Hyojun Kim, SeongHwan Cho. A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM |
| 279 | -- | 290 | Daewoong Lee, Jaehyeok Baek, Hye-Jung Kwon, Daehyun Kwon, Chulhee Cho, Sang-Hoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun Young Park, Hyoung-Joo Kim, Ho-Seok Seol, Juhwan Kim, Jung-Bum Shin, Gil-Young Kang, Yong Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, Chanyong Lee, SeungSeob Lee, Taehoon Park, Chi Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-young Oh, Sangjoon Hwang, Kyung Suk Oh, Jung Hwan Choi, Jooyoung Lee. A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ |
| 291 | -- | 302 | Dae-Han Kwon, Seongju Lee, Kyuyoung Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dongyoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Guhyun Kim, Byeongju An, Jaewook Lee, Donguc Ko, Younggun Jun, Ilwoong Kim, Choungki Song, Ilkon Kim, Chanwook Park, Seho Kim, Chunseok Jeong, Euicheol Lim, Dongkyun Kim, Jieun Jang, Il Park 0001, Junhyun Chun, Joohwan Cho. A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application |
| 303 | -- | 315 | Je-Min Hung, Tai-Hao Wen, Yen-Hsiang Huang, Sheng-Po Huang, Fu-Chun Chang, Chin-I Su, Win-San Khwa, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang. 8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices |
| 316 | -- | 328 | Jonghak Yuh, Yen-Lung Jason Li, Heguang Li, Yoshihiro Oyama, Cynthia Hsu, Pradeep Anantula, Gwang Yeong Stanley Jeong, Anirudh Amarnath, Siddhesh Darne, Sneha Bhatia, Tianyu Tang, Aditya Arya, Naman Rastogi, Naoki Ookuma, Hiroyuki Mizukoshi, Alex Yap, Demin Wang, Steve Kim, Yonggang Wu, Min Peng, Jason Lu, Tommy Ip, Seema Malhotra, Taekeun Han, Masatoshi Okumura, Jiwen Liu, Jeongduk John Sohn, Hardwell Chibvongodze, Muralikrishna Balaga, Akihiro Matsuda, Chen Chen, Indra K. V, V. S. N. K. Chaitanya G., Venky Ramachandra, Yosuke Kato, Ravi Kumar, Huijuan Wang, Farookh Moogat, In-Soo Yoon, Kazushige Kanda, Takahiro Shimizu, Noboru Shibata, Kosuke Yanagidaira, Takuyo Kodama, Ryo Fukuda, Yasuhiro Hirashima, Mitsuhiro Abe. A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface |