Journal: IEEE Micro

Volume 39, Issue 6

4 -- 5Lizy Kurian John. 3-D Chips! Chips are Getting Denser and Taller Than Ever!!
6 -- 7Vijaykrishnan Narayanan. Going Vertical: The Future of Electronics
8 -- 15Suman Datta, Sourav Dutta, Benjamin Grisafe, Jeff Smith, Srivatsa Srinivasa, Huacheng Ye. Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration
16 -- 27Mindy D. Bishop, H.-S. Philip Wong, Subhasish Mitra, Max M. Shulaker. Monolithic 3-D Integration
28 -- 37Zhixiao Zhang, Xin Si, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Meng-Fan Chang. Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration
38 -- 45Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim. A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology
46 -- 53Itir Akgun, Dylan C. Stow, Yuan Xie 0001. Network-on-Chip Design Guidelines for Monolithic 3-D Integration
54 -- 63Shihui Yin, Jae-sun Seo, Yulhwa Kim, Xu Han, Hugh J. Barnaby, Shimeng Yu, Yandong Luo, Wangxin He, Xiaoyu Sun, Jae-Joon Kim. Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep Learning
64 -- 72Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce Jacob, Donald Yeung. Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die
73 -- 81Marco Donato, Lillian Pentecost, David Brooks 0001, Gu-Yeon Wei. MEMTI: Optimizing On-Chip Nonvolatile Storage for Visual Multitask Inference at the Edge
82 -- 84Shane Greenstein. Antitrust in Three Acts

Volume 39, Issue 5

4 -- 5Lizy Kurian John. Machine Learning Accelerators and More
6 -- 7Hadi Esmaeilzadeh, Jongse Park. Machine Learning Acceleration
8 -- 16Thierry Moreau, TianQi Chen, Luis Vega, Jared Roesch, Eddie Q. Yan, Lianmin Zheng, Josh Fromm, Ziheng Jiang, Luis Ceze, Carlos Guestrin, Arvind Krishnamurthy. A Hardware-Software Blueprint for Flexible Deep Learning Specialization
17 -- 25Yongming Shen, Tianchu Ji, Michael Ferdman, Peter Milder. Argus: An End-to-End Framework for Accelerating CNNs on FPGAs
26 -- 35Mostafa Mahmoud, Dylan Malone Stuart, Zissis Poulos, Alberto Delmas Lascorz, Patrick Judd, Sayeh Sharify, Milos Nikolic, Kevin Siu, Isak Edo Vivancos, Jorge Albericio, Andreas Moshovos. Accelerating Image-Sensor-Based Deep Learning Applications
36 -- 45Marc Riera, Jose-Maria Arnau, Antonio González 0001. CGPA: Coarse-Grained Pruning of Activations for Energy-Efficient RNN Inference
46 -- 54Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili. ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays
55 -- 63Ahmet Caner Yuzuguler, Firat Celik, Mario Drumond, Babak Falsafi, Pascal Frossard. Analog Neural Networks With Deep-Submicrometer Nonlinear Synapses
64 -- 72Mingu Kang, Prakalp Srivastava, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag. An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine Learning Algorithms
73 -- 81Jonghyun Bae, Hakbeom Jang, Jeonghun Gong, Wenjing Jin, Shine Kim, Jaeyoung Jang, Tae Jun Ham, Jinkyu Jeong, Jae W. Lee. SSDStreamer: Specializing I/O Stack for Large-Scale Machine Learning
82 -- 90Youngeun Kwon, Minsoo Rhu. A Disaggregated Memory System for Deep Learning
91 -- 101Saptadeep Pal, Eiman Ebrahimi, Arslan Zulfiqar, Yaosheng Fu, Victor Zhang, Szymon Migacz, David W. Nellans, Puneet Gupta. Optimizing Multi-GPU Parallelization Strategies for Deep Learning Training
102 -- 111Swagath Venkataramani, Jungwook Choi, Vijayalakshmi Srinivasan, Wei Wang, Jintao Zhang, Marcel Schaal, Mauricio J. Serrano, Kazuaki Ishizaki, Hiroshi Inoue, Eri Ogawa, Moriyoshi Ohara, Leland Chang, Kailash Gopalakrishnan. DeepTools: Compiler and Execution Runtime Extensions for RaPiD AI Accelerator
114 -- 116Richard Mateosian. What I Missed
119 -- 124Mark D. Hill. Reflections and Research Advice Upon Receiving the 2019 Eckert-Mauchly Award
126 -- 128Shane Greenstein. Earning Stripes in Medical Machine Learning

Volume 39, Issue 4

4 -- 5Lizy Kurian John. Secure Architectures
6 -- 7Simha Sethumadhavan, Mohit Tiwari. Secure Architectures
8 -- 16Fan Yao, Hongyu Fang, Milos Doroslovacki, Guru Venkataramani. Leveraging Cache Management Hardware for Practical Defense Against Cache Timing Channel Attacks
17 -- 26Rafael Misoczki, Sean Gulley, Vinodh Gopal, Martin G. Dixon, Hrvoje Vrsalovic, Wajdi K. Feghali. Toward Postquantum Security for Embedded Cores
27 -- 34Pradip Bose, Saibal Mukhopadhyay. Energy-Secure System Architectures (ESSA): A Workshop Report
35 -- 42Cynthia Sturton, Matthew Hicks, Samuel T. King, Jonathan M. Smith. FinalFilter: Asserting Security Properties of a Processor at Runtime
44 -- 54Roman Kaplan, Leonid Yavits, Ran Ginosar. RASSA: Resistive Prealignment Accelerator for Approximate DNA Long Read Mapping
55 -- 64Amirhossein Mirhosseini, Thomas F. Wenisch. The Queuing-First Approach for Tail Management of Interactive Services
66 -- 68Shane Greenstein. The Aftermath of the Dyn DDOS Attack

Volume 39, Issue 3

4 -- 5Lizy Kurian John. Top Picks
6 -- 10Sandhya Dwarkadas. Top Picks in Computer Architecture from Conferences in 2018
11 -- 19Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan 0001, Dennis Sylvester, David T. Blaauw, Reetuparna Das, Ravi R. Iyer. Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks
20 -- 28Jeremy Fowers, Kalin Ovtcharov, Michael K. Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger. Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor
29 -- 37Yatish Turakhia, Gill Bejerano, William J. Dally. Darwin: A Genomics Coprocessor
38 -- 46Martin Maas, Krste Asanovic, John Kubiatowicz. A Hardware Accelerator for Tracing Garbage Collection
47 -- 55Sizhuo Zhang, Andrew Wright, Thomas Bourgeat. Composable Building Blocks to Open Up Processor Design
56 -- 65Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic. FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
66 -- 74Jo Van Bulck, Marina Minkin, Ofir Weisse, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Thomas F. Wenisch, Yuval Yarom, Raoul Strackx. Breaking Virtual Memory Protection and the SGX Ecosystem with Foreshadow
75 -- 83Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen. Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management
84 -- 93Caroline Trippel, Daniel Lustig, Margaret Martonosi. Security Verification via Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach
94 -- 102Aasheesh Kolli, Vaibhav Gogte, Ali G. Saidi, Stephan Diestelhorst, William Wang, Peter M. Chen, Satish Narayanasamy, Thomas F. Wenisch. Language Support for Memory Persistency
103 -- 109Kate Nguyen, Kehan Lyu, Xianze Meng, Vilas Sridharan, Xun Jian. Nonblocking DRAM Refresh
110 -- 117Aniruddh Ramrakhyani, Paul V. Gratz, Tushar Krishna. Synchronized Progress in Interconnection Networks (SPIN): A New Theory for Deadlock Freedom
118 -- 120Shane Greenstein. Misapplied Metaphors in AI Policy

Volume 39, Issue 2

4 -- 5Lizy Kurian John. Emerging Hot Chips and Systems
6 -- 8John Kubiatowicz, Stefan Rusu. Hot Chips 30
9 -- 19Mark D. Hill, Jon Masters, Parthasarathy Ranganathan, Paul Turner, John L. Hennessy. On the Spectre and Meltdown Processor Security Vulnerabilities
20 -- 28Doug Stiles. The Hardware Security Behind Azure Sphere
29 -- 36Mohamed Arafa, Bahaa Fahim, Sailesh Kottapalli, Akhilesh Kumar, Lily Pao Looi, Sreenivas Mandava, Andy Rudoff, Ian M. Steiner, Bob Valentine, Geetha Vedaraman, Sujal Vora. Cascade Lake: Next Generation Intel Xeon Scalable Processor
37 -- 44Jeff Rupley, Brad Burgess, Brian Grayson, Gerald D. Zuraski. Samsung M3 Processor
45 -- 51Bill Gervasi. Will Carbon Nanotube Memory Replace DRAM?
52 -- 60Christopher Celio, Pi-Feng Chiu, Krste Asanovic, Borivoje Nikolic, David A. Patterson. BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS
62 -- 64Shane Greenstein. Where the Frontier Thrives: Bricks, Mix, and Zip

Volume 39, Issue 1

4 -- 5Lizy Kurian John. To the Era of Intelligent Chips and Systems
6 -- 7Yuan Xie, Jishen Zhao. Emerging Memory Technologies
8 -- 16Abhishek Kumar Jain, G. Scott Lloyd, Maya Gokhale. Performance Assessment of Emerging Memories Through FPGA Emulation
17 -- 23Yeseong Kim, Mohsen Imani, Tajana Simunic Rosing. Image Recognition Accelerator Design Using In-Memory Processing
24 -- 32Mimi Xie, Chen Pan, Youtao Zhang, Jingtong Hu, Yongpan Liu, Chun Jason Xue. A Novel STT-RAM-Based Hybrid Cache for Intermittently Powered Processors in IoT Devices
33 -- 43Nishil Talati, Heonjae Ha, Ben Perach, Ronny Ronen, Shahar Kvatinsky. CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM
44 -- 51Pengfei Zuo, Yu Hua 0001, Ming Zhao, Wen Zhou, Yuncheng Guo. Write Deduplication and Hash Mode Encryption for Secure Nonvolatile Main Memory
52 -- 53Moinuddin K. Qureshi. With New Memories Come New Challenges
54 -- 57Yiran Chen. Reshaping Future Computing Systems With Emerging Nonvolatile Memory Technologies
58 -- 61Engin Ipek. Memristive Accelerators for Dense and Sparse Linear Algebra: From Machine Learning to High-Performance Scientific Computing
62 -- 64Steven Swanson. Redesigning File Systems for Nonvolatile Main Memory
65 -- 66Yan Solihin. Persistent Memory: Abstractions, Abstractions, and Abstractions
67 -- 68Sam H. Noh. Has the Time for EMT Finally Come?
70 -- 72Shane Greenstein. Six Infrastructure Trends