817 | -- | 830 | Yang Zhao, Krishnendu Chakrabarty. Cross-Contamination Avoidance for Droplet Routing in Digital Microfluidic Biochips |
831 | -- | 844 | Xue-Yang Zhu, Twan Basten, Marc Geilen, Sander Stuijk. Efficient Retiming of Multirate DSP Algorithms |
845 | -- | 857 | Mu-Shun Matt Lee, Wei-Ting Liao, Chien-Nan Jimmy Liu. Levelized High-Level Current Model of Logic Blocks for Dynamic Supply Noise Analysis |
858 | -- | 867 | Komail M. H. Badami, Shreepad Karmalkar. Quasi-Static Compact Model for Coupling Between Aligned Contacts on Finite Substrates With Insulating or Conducting Backplanes |
868 | -- | 877 | Haifeng Qian, Phillip J. Restle, Joseph N. Kozhaya, Clifford L. Gunion. Subtractive Router for Tree-Driven-Grid Clocks |
878 | -- | 889 | Chung-Wei Lin, Po-Wei Lee, Yao-Wen Chang, Chin-Fang Shen, Wei-Chih Tseng. An Efficient Pre-Assignment Routing Algorithm for Flip-Chip Designs |
890 | -- | 903 | Pengju Ren, Mieszko Lis, Myong Hyon Cho, Keun Sup Shim, Christopher W. Fletcher, Omer Khan, Nanning Zheng, Srinivas Devadas. HORNET: A Cycle-Level Multicore Simulator |
904 | -- | 917 | Jin Cui, Douglas L. Maskell. A Fast High-Level Event-Driven Thermal Estimator for Dynamic Thermal Aware Scheduling |
918 | -- | 929 | Wing Chiu Tam, R. D. (Shawn) Blanton. SLIDER: Simulation of Layout-Injected Defects for Electrical Responses |
930 | -- | 940 | Ting-Ju Chen, Jin-Fu Li, Tsu-Wei Tseng. Cost-Efficient Built-In Redundancy Analysis With Optimal Repair Rate for RAMs |
941 | -- | 949 | Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian. A New Method for March Test Algorithm Generation and Its Application for Fault Detection in RAMs |
950 | -- | 957 | Thomas Rabenalt, Michael Richter, Frank Poehl, Michael Gössel. Highly Efficient Test Response Compaction Using a Hierarchical X-Masking Technique |
958 | -- | 967 | Afsaneh Nassery, Osman Emir Erol, Sule Ozev, Marian Verhelst. Test Signal Development and Analysis for OFDM Systems RF Front-End Parameter Extraction |
968 | -- | 979 | Ender Yilmaz, Sule Ozev. Test Application for Analog/RF Circuits With Low Computational Burden |