| 357 | -- | 369 | Da-Wei Chang, Ing-Chao Lin, Lin-Chun Yong. ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore Systems |
| 370 | -- | 383 | Sukanta Bhattacharjee, Sharbatanu Chatterjee, Ansuman Banerjee, Tsung-Yi Ho, Krishnendu Chakrabarty, Bhargab B. Bhattacharya. Adaptation of Biochemical Protocols to Handle Technology-Change for Digital Microfluidics |
| 384 | -- | 397 | Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec. A Unified Design Flow to Automatically Generate On-Chip Monitors During High-Level Synthesis of Hardware Accelerators |
| 398 | -- | 411 | Miroslav Kvassay, Elena Zaitseva, Vitaly G. Levashenko, Jozef Kostolny. Reliability Analysis of Multiple-Outputs Logic Circuits Based on Structure Function Approach |
| 412 | -- | 420 | AmirMahdi Ahmadinejad, Hamid Zarrabi-Zadeh. Finding Maximum Disjoint Set of Boundary Rectangles With Application to PCB Routing |
| 421 | -- | 434 | Xiaochen Liu, Shupeng Sun, Xin Li 0001, Haifeng Qian, Pingqiang Zhou. Machine Learning for Noise Sensor Placement and Full-Chip Voltage Emergency Detection |
| 435 | -- | 448 | Christian Pilato, Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni. System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip |
| 449 | -- | 462 | Haoran Li, Xuan Wang, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang. Energy-Efficient Power Delivery System Paradigms for Many-Core Processors |
| 463 | -- | 474 | Ronald Shawn Blanton, Fa Wang, Cheng Xue, Pranab K. Nag, Yang Xue, Xin Li. DFM Evaluation Using IC Diagnosis Data |
| 475 | -- | 488 | Pablo González de Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sánchez Espeso. Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification |
| 489 | -- | 502 | Mohammad Fawaz, Farid N. Najm. Fast Vectorless RLC Grid Verification |
| 503 | -- | 507 | Irith Pomeranz. LFSR-Based Generation of Multicycle Tests |
| 508 | -- | 512 | Elishai Ezra Tsur. Computer Aided Design of a Microscale Digitally Controlled Hydraulic Resistor |
| 513 | -- | 517 | Chao Wang, Lei Gong, Qi Yu, Xi Li, Yuan Xie, Xuehai Zhou. DLAU: A Scalable Deep Learning Accelerator Unit on FPGA |