Journal: IEEE Trans. VLSI Syst.

Volume 12, Issue 8

793 -- 811Paul Pop, Petru Eles, Zebo Peng, Traian Pop. Scheduling and mapping in an incremental design methodology for distributed real-time embedded systems
812 -- 826Peter Petrov, Alex Orailoglu. Low-power instruction bus encoding for embedded processors
827 -- 836Yen-Jen Chang, Feipei Lai, Chia-Lin Yang. Zero-aware asymmetric SRAM cell for reducing cache power in writing zero
837 -- 846Naehyuck Chang, Inseok Choi, Hojun Shim. DLS: dynamic backlight luminance scaling of liquid crystal display
847 -- 856Arkadiy Morgenshtein, Michael Moreinis, Ran Ginosar. Asynchronous gate-diffusion-input (GDI) circuits
857 -- 873Tiberiu Chelcea, Steven M. Nowick. Robust interfaces for mixed-timing systems
874 -- 877Shinn-Ying Ho, Shinn-Jang Ho, Yi-Kuang Lin, W. C.-C. Chu. An orthogonal simulated annealing algorithm for large floorplanning problems
876 -- 880Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III, Dale Edwards. A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability